From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Heiko Stuebner <heiko@sntech.de>,
Fengguang Wu <fengguang.wu@intel.com>,
Wei Yongjun <weiyongjun1@huawei.com>,
"open list:GENERIC PHY FRAMEWORK" <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 05/16] phy: qcom-qmp: Fix PHY block reset sequence
Date: Tue, 21 Nov 2017 14:53:15 +0530 [thread overview]
Message-ID: <1511256206-1587-6-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org>
PHY block or asynchronous reset requires signal
to be asserted before de-asserting. Driver is only
de-asserting signal which is already low, hence
reset operation is a no-op. Fix this by asserting
signal first. Also, resetting requires PHY clocks
to be turned ON only after reset is finished. Fix
that as well.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2f427e3..aa27757 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -739,13 +739,16 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
return ret;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
- if (ret) {
- dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
- goto err_clk_enable;
+ for (i = 0; i < cfg->num_resets; i++) {
+ ret = reset_control_assert(qmp->resets[i]);
+ if (ret) {
+ dev_err(qmp->dev, "%s reset assert failed\n",
+ cfg->reset_list[i]);
+ goto err_rst_assert;
+ }
}
- for (i = 0; i < cfg->num_resets; i++) {
+ for (i = cfg->num_resets - 1; i >= 0; i--) {
ret = reset_control_deassert(qmp->resets[i]);
if (ret) {
dev_err(qmp->dev, "%s reset deassert failed\n",
@@ -754,6 +757,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
}
}
+ ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ if (ret) {
+ dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
+ goto err_rst;
+ }
+
if (cfg->has_phy_com_ctrl)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
@@ -778,7 +787,7 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
if (ret) {
dev_err(qmp->dev,
"phy common block init timed-out\n");
- goto err_rst;
+ goto err_com_init;
}
}
@@ -786,11 +795,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
return 0;
+err_com_init:
+ clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
err_rst:
- while (--i >= 0)
+ while (++i < cfg->num_resets)
reset_control_assert(qmp->resets[i]);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
-err_clk_enable:
+err_rst_assert:
regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
mutex_unlock(&qmp->phy_mutex);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Heiko Stuebner <heiko@sntech.de>,
Fengguang Wu <fengguang.wu@intel.com>,
Wei Yongjun <weiyongjun1@huawei.com>,
linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK)
Subject: [PATCH v3 05/16] phy: qcom-qmp: Fix PHY block reset sequence
Date: Tue, 21 Nov 2017 14:53:15 +0530 [thread overview]
Message-ID: <1511256206-1587-6-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org>
PHY block or asynchronous reset requires signal
to be asserted before de-asserting. Driver is only
de-asserting signal which is already low, hence
reset operation is a no-op. Fix this by asserting
signal first. Also, resetting requires PHY clocks
to be turned ON only after reset is finished. Fix
that as well.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 2f427e3..aa27757 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -739,13 +739,16 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
return ret;
}
- ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
- if (ret) {
- dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
- goto err_clk_enable;
+ for (i = 0; i < cfg->num_resets; i++) {
+ ret = reset_control_assert(qmp->resets[i]);
+ if (ret) {
+ dev_err(qmp->dev, "%s reset assert failed\n",
+ cfg->reset_list[i]);
+ goto err_rst_assert;
+ }
}
- for (i = 0; i < cfg->num_resets; i++) {
+ for (i = cfg->num_resets - 1; i >= 0; i--) {
ret = reset_control_deassert(qmp->resets[i]);
if (ret) {
dev_err(qmp->dev, "%s reset deassert failed\n",
@@ -754,6 +757,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
}
}
+ ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks);
+ if (ret) {
+ dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret);
+ goto err_rst;
+ }
+
if (cfg->has_phy_com_ctrl)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
@@ -778,7 +787,7 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
if (ret) {
dev_err(qmp->dev,
"phy common block init timed-out\n");
- goto err_rst;
+ goto err_com_init;
}
}
@@ -786,11 +795,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
return 0;
+err_com_init:
+ clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
err_rst:
- while (--i >= 0)
+ while (++i < cfg->num_resets)
reset_control_assert(qmp->resets[i]);
- clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
-err_clk_enable:
+err_rst_assert:
regulator_bulk_disable(cfg->num_vregs, qmp->vregs);
mutex_unlock(&qmp->phy_mutex);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-11-21 9:23 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-21 9:23 [PATCH v3 00/16] Support for Qualcomm QUSBv2 and QMPv3 USB PHYs Manu Gautam
2017-11-21 9:23 ` [PATCH v3 01/16] phy: qcom-qmp: Fix phy pipe clock gating Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 02/16] phy: qcom-qmp: Adapt to clk_bulk_* APIs Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-12-20 2:37 ` Vivek Gautam
[not found] ` <CAFp+6iEgiv0KJo+ikR_jyakc2dGjetiArJSvC4d5JFO0ZnO7-Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-20 5:03 ` Manu Gautam
2017-12-20 5:03 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 03/16] phy: qcom-qmp: Power-on PHY before initialization Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-22 18:03 ` Stephen Boyd
2017-11-23 3:59 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 04/16] phy: qcom-qusb2: " Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` Manu Gautam [this message]
2017-11-21 9:23 ` [PATCH v3 05/16] phy: qcom-qmp: Fix PHY block reset sequence Manu Gautam
2017-11-21 9:23 ` [PATCH v3 06/16] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 07/16] phy: qcom-qusb2: Add support for different register layouts Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-12-05 10:23 ` Vivek Gautam
[not found] ` <3c0dca03-bf9e-8747-8c31-546172f88d6f-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-12 8:51 ` Manu Gautam
2017-12-12 8:51 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 08/16] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 09/16] phy: qcom-qusb2: Add support " Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 10/16] phy: qcom-qmp: Move register offsets to header file Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-22 17:26 ` Stephen Boyd
2017-11-23 4:02 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 11/16] phy: qcom-qmp: Add register offsets for QMP V3 PHY Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 12/16] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 13/16] phy: qcom-qmp: Add support for QMP V3 USB3 PHY Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 14/16] phy: Add notify_speed callback Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-12-12 11:43 ` Kishon Vijay Abraham I
2017-12-12 11:43 ` Kishon Vijay Abraham I
2017-12-12 15:24 ` Manu Gautam
2017-12-20 5:49 ` Kishon Vijay Abraham I
2017-12-20 5:49 ` Kishon Vijay Abraham I
2017-12-20 6:29 ` Manu Gautam
2017-12-20 7:17 ` Kishon Vijay Abraham I
2017-12-20 7:17 ` Kishon Vijay Abraham I
2017-12-20 8:41 ` Manu Gautam
2017-12-20 8:41 ` [v3,14/16] " Manu Gautam
2017-12-28 11:04 ` [PATCH v3 14/16] " Kishon Vijay Abraham I
2017-12-28 11:04 ` Kishon Vijay Abraham I
2017-12-28 11:04 ` [v3,14/16] " Kishon Vijay Abraham I
2017-12-29 4:24 ` [PATCH v3 14/16] " Manu Gautam
2017-12-29 4:24 ` [v3,14/16] " Manu Gautam
2017-12-29 6:28 ` [PATCH v3 14/16] " Kishon Vijay Abraham I
2017-12-29 6:28 ` Kishon Vijay Abraham I
2017-12-29 6:28 ` [v3,14/16] " Kishon Vijay Abraham I
2018-01-02 5:42 ` [PATCH v3 14/16] " Manu Gautam
2018-01-02 5:42 ` [v3,14/16] " Manu Gautam
2017-11-21 9:23 ` [PATCH v3 15/16] phy: qcom-qusb2: Add support for runtime PM Manu Gautam
2017-11-21 9:23 ` Manu Gautam
2017-11-21 9:23 ` [PATCH v3 16/16] phy: qcom-qmp: " Manu Gautam
2017-11-21 9:23 ` Manu Gautam
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