Patch "PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD" has been added to the 4.14-stable tree

Patch "PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD" has been added to the 4.14-stable tree

[gregkh]

This is a note to let you know that I've just added the patch titled

    PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD

to the 4.14-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pci-aspm-use-correct-capability-pointer-to-program-ltr_l1.2_threshold.patch
and it can be found in the queue-4.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From c00054f540bf81e592e1fee709b0bdbf20f478b5 Mon Sep 17 00:00:00 2001
From: Bjorn Helgaas <bhelgaas@google.com>
Date: Mon, 13 Nov 2017 15:05:50 -0600
Subject: PCI/ASPM: Use correct capability pointer to program LTR_L1.2_THRESHOLD

From: Bjorn Helgaas <bhelgaas@google.com>

commit c00054f540bf81e592e1fee709b0bdbf20f478b5 upstream.

Previously we programmed the LTR_L1.2_THRESHOLD in the parent (upstream)
device using the capability pointer of the *child* (downstream) device,
which corrupted some random word of the parent's config space.

Use the parent's L1 SS capability pointer to program its
LTR_L1.2_THRESHOLD.

Fixes: aeda9adebab8 ("PCI/ASPM: Configure L1 substate settings")
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
CC: Rajat Jain <rajatja@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/pci/pcie/aspm.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -658,7 +658,7 @@ static void pcie_config_aspm_l1ss(struct
 					0xFF00, link->l1ss.ctl1);
 
 		/* Program LTR L1.2 threshold in both ports */
-		pci_clear_and_set_dword(parent,	dw_cap_ptr + PCI_L1SS_CTL1,
+		pci_clear_and_set_dword(parent,	up_cap_ptr + PCI_L1SS_CTL1,
 					0xE3FF0000, link->l1ss.ctl1);
 		pci_clear_and_set_dword(child, dw_cap_ptr + PCI_L1SS_CTL1,
 					0xE3FF0000, link->l1ss.ctl1);


Patches currently in stable-queue which might be from bhelgaas@google.com are

queue-4.14/pci-hv-use-effective-affinity-mask.patch
queue-4.14/pci-set-cavium-acs-capability-quirk-flags-to-assert-rr-cr-sv-uf.patch
queue-4.14/pci-aspm-account-for-downstream-device-s-port-common_mode_restore_time.patch
queue-4.14/pci-aspm-use-correct-capability-pointer-to-program-ltr_l1.2_threshold.patch
queue-4.14/pci-apply-cavium-thunderx-acs-quirk-to-more-root-ports.patch