Patch "EDAC, i5000, i5400: Fix use of MTR_DRAM_WIDTH macro" has been added to the 3.18-stable tree

[Greg Kroah-Hartman <gregkh@linuxfoundation.org>]

This is a note to let you know that I've just added the patch titled

    EDAC, i5000, i5400: Fix use of MTR_DRAM_WIDTH macro

to the 3.18-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     edac-i5000-i5400-fix-use-of-mtr_dram_width-macro.patch
and it can be found in the queue-3.18 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


From foo@baz Thu Dec 14 21:30:47 CET 2017
From: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Date: Wed, 8 Mar 2017 20:18:09 -0500
Subject: EDAC, i5000, i5400: Fix use of MTR_DRAM_WIDTH macro

From: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>


[ Upstream commit e61555c29c28a4a3b6ba6207f4a0883ee236004d ]

The MTR_DRAM_WIDTH macro returns the data width. It is sometimes used
as if it returned a boolean true if the width if 8. Fix the tests where
MTR_DRAM_WIDTH is misused.

Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170309011809.8340-1-jeremy.lefaure@lse.epita.fr
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 drivers/edac/i5000_edac.c |    2 +-
 drivers/edac/i5400_edac.c |    5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)



Patches currently in stable-queue which might be from jeremy.lefaure@lse.epita.fr are

queue-3.18/edac-i5000-i5400-fix-definition-of-nrecmemb-register.patch
queue-3.18/edac-i5000-i5400-fix-use-of-mtr_dram_width-macro.patch
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--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1293,7 +1293,7 @@ static int i5000_init_csrows(struct mem_
 			dimm->mtype = MEM_FB_DDR2;
 
 			/* ask what device type on this row */
-			if (MTR_DRAM_WIDTH(mtr))
+			if (MTR_DRAM_WIDTH(mtr) == 8)
 				dimm->dtype = DEV_X8;
 			else
 				dimm->dtype = DEV_X4;
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -1207,13 +1207,14 @@ static int i5400_init_dimms(struct mem_c
 
 			dimm->nr_pages = size_mb << 8;
 			dimm->grain = 8;
-			dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4;
+			dimm->dtype = MTR_DRAM_WIDTH(mtr) == 8 ?
+				      DEV_X8 : DEV_X4;
 			dimm->mtype = MEM_FB_DDR2;
 			/*
 			 * The eccc mechanism is SDDC (aka SECC), with
 			 * is similar to Chipkill.
 			 */
-			dimm->edac_mode = MTR_DRAM_WIDTH(mtr) ?
+			dimm->edac_mode = MTR_DRAM_WIDTH(mtr) == 8 ?
 					  EDAC_S8ECD8ED : EDAC_S4ECD4ED;
 			ndimms++;
 		}