* [PATCH v2] drm/i915: Generalize definition for crtc mask
@ 2017-12-13 9:25 Mika Kahola
2017-12-13 9:42 ` ✓ Fi.CI.BAT: success for drm/i915: Generalize definition for crtc mask (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Mika Kahola @ 2017-12-13 9:25 UTC (permalink / raw)
To: intel-gfx
crtc_mask is defined explicitly defined for a certain number of pipes per
platform. Let's generalize this in a way that crtc_mask dependens only on
the number of pipes defined in device info.
v2: Use BIT() macro wherever possible (Ville)
Drop generalization for all other connectors except DDI (Ville)
Fix DP-MST crtc mask to be dependent only on pipe (Ville)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c | 4 ++--
drivers/gpu/drm/i915/intel_ddi.c | 6 +++++-
drivers/gpu/drm/i915/intel_dp.c | 6 +++---
drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/intel_hdmi.c | 6 +++---
drivers/gpu/drm/i915/intel_lvds.c | 6 +++---
drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
drivers/gpu/drm/i915/intel_tv.c | 4 ++--
9 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9f31aea..9557e6e 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
crt->base.type = INTEL_OUTPUT_ANALOG;
crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
if (IS_I830(dev_priv))
- crt->base.crtc_mask = (1 << 0);
+ crt->base.crtc_mask = BIT(PIPE_A);
else
- crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+ crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
if (IS_GEN2(dev_priv))
connector->interlace_allowed = 0;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 369f780..581a8b3 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
struct drm_encoder *encoder;
bool init_hdmi, init_dp, init_lspcon = false;
int max_lanes;
+ enum pipe pipe;
if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) {
switch (port) {
@@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
intel_encoder->type = INTEL_OUTPUT_DDI;
intel_encoder->power_domain = intel_port_to_power_domain(port);
intel_encoder->port = port;
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+
+ for_each_pipe(dev_priv, pipe)
+ intel_encoder->crtc_mask |= BIT(pipe);
+
intel_encoder->cloneable = 0;
intel_infoframe_init(intel_dig_port);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 35c5299..a18d4b2 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
intel_encoder->power_domain = intel_port_to_power_domain(port);
if (IS_CHERRYVIEW(dev_priv)) {
if (port == PORT_D)
- intel_encoder->crtc_mask = 1 << 2;
+ intel_encoder->crtc_mask = BIT(PIPE_C);
else
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
} else {
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
}
intel_encoder->cloneable = 0;
intel_encoder->port = port;
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
index c3de091..07d3f58 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum
intel_encoder->type = INTEL_OUTPUT_DP_MST;
intel_encoder->power_domain = intel_dig_port->base.power_domain;
intel_encoder->port = intel_dig_port->base.port;
- intel_encoder->crtc_mask = 0x7;
+ intel_encoder->crtc_mask = BIT(pipe);
intel_encoder->cloneable = 0;
intel_encoder->compute_config = intel_dp_mst_compute_config;
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 754baa0..9de8615 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv)
intel_encoder->type = INTEL_OUTPUT_DVO;
intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
intel_encoder->port = port;
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
switch (dvo->type) {
case INTEL_DVO_CHIP_TMDS:
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index bced7b9..75f2b7a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
intel_encoder->port = port;
if (IS_CHERRYVIEW(dev_priv)) {
if (port == PORT_D)
- intel_encoder->crtc_mask = 1 << 2;
+ intel_encoder->crtc_mask = BIT(PIPE_C);
else
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
} else {
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
}
intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
/*
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index ef80499..7b0f9519 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -1026,11 +1026,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
intel_encoder->port = PORT_NONE;
intel_encoder->cloneable = 0;
if (HAS_PCH_SPLIT(dev_priv))
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
else if (IS_GEN4(dev_priv))
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
else
- intel_encoder->crtc_mask = (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_B);
drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 2b87648..3c568f6 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
bytes[0], bytes[1]);
return false;
}
- intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+ intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
return true;
}
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index b3dabc2..3b65197 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private *dev_priv)
intel_encoder->type = INTEL_OUTPUT_TVOUT;
intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
intel_encoder->port = PORT_NONE;
- intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+ intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
intel_encoder->cloneable = 0;
- intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1));
+ intel_encoder->base.possible_crtcs = BIT(PIPE_A) | BIT(PIPE_B);
intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
/* BIOS margin values */
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Generalize definition for crtc mask (rev2)
2017-12-13 9:25 [PATCH v2] drm/i915: Generalize definition for crtc mask Mika Kahola
@ 2017-12-13 9:42 ` Patchwork
2017-12-13 10:32 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-12-19 0:05 ` [PATCH v2] drm/i915: Generalize definition for crtc mask Rodrigo Vivi
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-12-13 9:42 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Generalize definition for crtc mask (rev2)
URL : https://patchwork.freedesktop.org/series/34894/
State : success
== Summary ==
Series 34894v2 drm/i915: Generalize definition for crtc mask
https://patchwork.freedesktop.org/api/1.0/series/34894/revisions/2/mbox/
Test gem_mmap_gtt:
Subgroup basic-small-bo-tiledx:
pass -> FAIL (fi-gdg-551) fdo#102575
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass -> INCOMPLETE (fi-snb-2520m) fdo#103713
dmesg-warn -> PASS (fi-kbl-r) fdo#104172 +1
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:436s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:442s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:381s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:507s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:279s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:507s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:511s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:485s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:471s
fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45
fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:263s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:537s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:359s
fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:391s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:472s
fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:446s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:480s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:524s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:476s
fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:528s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:585s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:450s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:539s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:559s
fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:514s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:492s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:454s
fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:409s
Blacklisted hosts:
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:608s
fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s
fi-cnl-y failed to connect after reboot
8874c0f95698c533c0daf69c6c41834d837fef87 drm-tip: 2017y-12m-12d-21h-34m-33s UTC integration manifest
19e153f98d83 drm/i915: Generalize definition for crtc mask
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7480/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.IGT: warning for drm/i915: Generalize definition for crtc mask (rev2)
2017-12-13 9:25 [PATCH v2] drm/i915: Generalize definition for crtc mask Mika Kahola
2017-12-13 9:42 ` ✓ Fi.CI.BAT: success for drm/i915: Generalize definition for crtc mask (rev2) Patchwork
@ 2017-12-13 10:32 ` Patchwork
2017-12-19 0:05 ` [PATCH v2] drm/i915: Generalize definition for crtc mask Rodrigo Vivi
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2017-12-13 10:32 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Generalize definition for crtc mask (rev2)
URL : https://patchwork.freedesktop.org/series/34894/
State : warning
== Summary ==
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
pass -> FAIL (shard-hsw) fdo#101623
Test kms_fbcon_fbt:
Subgroup fbc-suspend:
pass -> SKIP (shard-hsw)
Test gem_tiled_swapping:
Subgroup non-threaded:
incomplete -> PASS (shard-snb) fdo#104009
Test gem_pwrite:
Subgroup huge-gtt-backwards:
incomplete -> PASS (shard-hsw) fdo#104218
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#104009 https://bugs.freedesktop.org/show_bug.cgi?id=104009
fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
shard-hsw total:2712 pass:1535 dwarn:1 dfail:0 fail:11 skip:1165 time:9389s
shard-snb total:2712 pass:1310 dwarn:1 dfail:0 fail:11 skip:1390 time:8073s
Blacklisted hosts:
shard-apl total:2712 pass:1687 dwarn:1 dfail:0 fail:22 skip:1001 time:13889s
shard-kbl total:2656 pass:1770 dwarn:1 dfail:0 fail:22 skip:862 time:10778s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7480/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] drm/i915: Generalize definition for crtc mask
2017-12-13 9:25 [PATCH v2] drm/i915: Generalize definition for crtc mask Mika Kahola
2017-12-13 9:42 ` ✓ Fi.CI.BAT: success for drm/i915: Generalize definition for crtc mask (rev2) Patchwork
2017-12-13 10:32 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-12-19 0:05 ` Rodrigo Vivi
2017-12-19 8:16 ` Mika Kahola
2 siblings, 1 reply; 5+ messages in thread
From: Rodrigo Vivi @ 2017-12-19 0:05 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-gfx
On Wed, Dec 13, 2017 at 09:25:16AM +0000, Mika Kahola wrote:
> crtc_mask is defined explicitly defined for a certain number of pipes per
> platform. Let's generalize this in a way that crtc_mask dependens only on
> the number of pipes defined in device info.
>
> v2: Use BIT() macro wherever possible (Ville)
> Drop generalization for all other connectors except DDI (Ville)
> Fix DP-MST crtc mask to be dependent only on pipe (Ville)
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/intel_crt.c | 4 ++--
> drivers/gpu/drm/i915/intel_ddi.c | 6 +++++-
> drivers/gpu/drm/i915/intel_dp.c | 6 +++---
> drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/intel_dvo.c | 2 +-
> drivers/gpu/drm/i915/intel_hdmi.c | 6 +++---
> drivers/gpu/drm/i915/intel_lvds.c | 6 +++---
> drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
> drivers/gpu/drm/i915/intel_tv.c | 4 ++--
> 9 files changed, 21 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 9f31aea..9557e6e 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
> crt->base.type = INTEL_OUTPUT_ANALOG;
> crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
> if (IS_I830(dev_priv))
> - crt->base.crtc_mask = (1 << 0);
> + crt->base.crtc_mask = BIT(PIPE_A);
> else
> - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> + crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
if bit represents the pipe, why not to use for_each_pipe, like you did bellow,
everywhere else?
(random, maybe nonsense thought: maybe we end up even removing some of if/else?!)
>
> if (IS_GEN2(dev_priv))
> connector->interlace_allowed = 0;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 369f780..581a8b3 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> struct drm_encoder *encoder;
> bool init_hdmi, init_dp, init_lspcon = false;
> int max_lanes;
> + enum pipe pipe;
>
> if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) {
> switch (port) {
> @@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> intel_encoder->type = INTEL_OUTPUT_DDI;
> intel_encoder->power_domain = intel_port_to_power_domain(port);
> intel_encoder->port = port;
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +
> + for_each_pipe(dev_priv, pipe)
> + intel_encoder->crtc_mask |= BIT(pipe);
> +
> intel_encoder->cloneable = 0;
>
> intel_infoframe_init(intel_dig_port);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 35c5299..a18d4b2 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
> intel_encoder->power_domain = intel_port_to_power_domain(port);
> if (IS_CHERRYVIEW(dev_priv)) {
> if (port == PORT_D)
> - intel_encoder->crtc_mask = 1 << 2;
> + intel_encoder->crtc_mask = BIT(PIPE_C);
> else
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
> } else {
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
> }
> intel_encoder->cloneable = 0;
> intel_encoder->port = port;
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index c3de091..07d3f58 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum
> intel_encoder->type = INTEL_OUTPUT_DP_MST;
> intel_encoder->power_domain = intel_dig_port->base.power_domain;
> intel_encoder->port = intel_dig_port->base.port;
> - intel_encoder->crtc_mask = 0x7;
> + intel_encoder->crtc_mask = BIT(pipe);
> intel_encoder->cloneable = 0;
>
> intel_encoder->compute_config = intel_dp_mst_compute_config;
> diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
> index 754baa0..9de8615 100644
> --- a/drivers/gpu/drm/i915/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/intel_dvo.c
> @@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv)
> intel_encoder->type = INTEL_OUTPUT_DVO;
> intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
> intel_encoder->port = port;
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>
> switch (dvo->type) {
> case INTEL_DVO_CHIP_TMDS:
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index bced7b9..75f2b7a 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
> intel_encoder->port = port;
> if (IS_CHERRYVIEW(dev_priv)) {
> if (port == PORT_D)
> - intel_encoder->crtc_mask = 1 << 2;
> + intel_encoder->crtc_mask = BIT(PIPE_C);
> else
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
> } else {
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
> }
> intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
> /*
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index ef80499..7b0f9519 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -1026,11 +1026,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
> intel_encoder->port = PORT_NONE;
> intel_encoder->cloneable = 0;
> if (HAS_PCH_SPLIT(dev_priv))
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
> else if (IS_GEN4(dev_priv))
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
> else
> - intel_encoder->crtc_mask = (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_B);
>
> drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
> connector->display_info.subpixel_order = SubPixelHorizontalRGB;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index 2b87648..3c568f6 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
> bytes[0], bytes[1]);
> return false;
> }
> - intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> + intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>
> return true;
> }
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index b3dabc2..3b65197 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private *dev_priv)
> intel_encoder->type = INTEL_OUTPUT_TVOUT;
> intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
> intel_encoder->port = PORT_NONE;
> - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
> intel_encoder->cloneable = 0;
> - intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1));
> + intel_encoder->base.possible_crtcs = BIT(PIPE_A) | BIT(PIPE_B);
> intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
>
> /* BIOS margin values */
> --
> 2.7.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] drm/i915: Generalize definition for crtc mask
2017-12-19 0:05 ` [PATCH v2] drm/i915: Generalize definition for crtc mask Rodrigo Vivi
@ 2017-12-19 8:16 ` Mika Kahola
0 siblings, 0 replies; 5+ messages in thread
From: Mika Kahola @ 2017-12-19 8:16 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Mon, 2017-12-18 at 16:05 -0800, Rodrigo Vivi wrote:
> On Wed, Dec 13, 2017 at 09:25:16AM +0000, Mika Kahola wrote:
> >
> > crtc_mask is defined explicitly defined for a certain number of
> > pipes per
> > platform. Let's generalize this in a way that crtc_mask dependens
> > only on
> > the number of pipes defined in device info.
> >
> > v2: Use BIT() macro wherever possible (Ville)
> > Drop generalization for all other connectors except DDI (Ville)
> > Fix DP-MST crtc mask to be dependent only on pipe (Ville)
> >
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_crt.c | 4 ++--
> > drivers/gpu/drm/i915/intel_ddi.c | 6 +++++-
> > drivers/gpu/drm/i915/intel_dp.c | 6 +++---
> > drivers/gpu/drm/i915/intel_dp_mst.c | 2 +-
> > drivers/gpu/drm/i915/intel_dvo.c | 2 +-
> > drivers/gpu/drm/i915/intel_hdmi.c | 6 +++---
> > drivers/gpu/drm/i915/intel_lvds.c | 6 +++---
> > drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
> > drivers/gpu/drm/i915/intel_tv.c | 4 ++--
> > 9 files changed, 21 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_crt.c
> > b/drivers/gpu/drm/i915/intel_crt.c
> > index 9f31aea..9557e6e 100644
> > --- a/drivers/gpu/drm/i915/intel_crt.c
> > +++ b/drivers/gpu/drm/i915/intel_crt.c
> > @@ -951,9 +951,9 @@ void intel_crt_init(struct drm_i915_private
> > *dev_priv)
> > crt->base.type = INTEL_OUTPUT_ANALOG;
> > crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 <<
> > INTEL_OUTPUT_HDMI);
> > if (IS_I830(dev_priv))
> > - crt->base.crtc_mask = (1 << 0);
> > + crt->base.crtc_mask = BIT(PIPE_A);
> > else
> > - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 <<
> > 2);
> > + crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) |
> > BIT(PIPE_C);
> if bit represents the pipe, why not to use for_each_pipe, like you
> did bellow,
> everywhere else?
Ville commented that this change would only touch ddi and DP MST, hence
the unchanged behavior here. Of course, instead of hard coding the
BIT() macro was used. In fact, this could be changed something like
this
for_each_pip(dev_priv, pipe)
crt->base.crtc_mask |= BIT(pipe);
>
> (random, maybe nonsense thought: maybe we end up even removing some
> of if/else?!)
>
> >
> >
> > if (IS_GEN2(dev_priv))
> > connector->interlace_allowed = 0;
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > b/drivers/gpu/drm/i915/intel_ddi.c
> > index 369f780..581a8b3 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2767,6 +2767,7 @@ void intel_ddi_init(struct drm_i915_private
> > *dev_priv, enum port port)
> > struct drm_encoder *encoder;
> > bool init_hdmi, init_dp, init_lspcon = false;
> > int max_lanes;
> > + enum pipe pipe;
> >
> > if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) {
> > switch (port) {
> > @@ -2885,7 +2886,10 @@ void intel_ddi_init(struct drm_i915_private
> > *dev_priv, enum port port)
> > intel_encoder->type = INTEL_OUTPUT_DDI;
> > intel_encoder->power_domain =
> > intel_port_to_power_domain(port);
> > intel_encoder->port = port;
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> > +
> > + for_each_pipe(dev_priv, pipe)
> > + intel_encoder->crtc_mask |= BIT(pipe);
> > +
> > intel_encoder->cloneable = 0;
> >
> > intel_infoframe_init(intel_dig_port);
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 35c5299..a18d4b2 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -6205,11 +6205,11 @@ bool intel_dp_init(struct drm_i915_private
> > *dev_priv,
> > intel_encoder->power_domain =
> > intel_port_to_power_domain(port);
> > if (IS_CHERRYVIEW(dev_priv)) {
> > if (port == PORT_D)
> > - intel_encoder->crtc_mask = 1 << 2;
> > + intel_encoder->crtc_mask = BIT(PIPE_C);
> > else
> > - intel_encoder->crtc_mask = (1 << 0) | (1
> > << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B);
> > } else {
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) |
> > (1 << 2);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B) | BIT(PIPE_C);
> > }
> > intel_encoder->cloneable = 0;
> > intel_encoder->port = port;
> > diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/intel_dp_mst.c
> > index c3de091..07d3f58 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> > @@ -553,7 +553,7 @@ intel_dp_create_fake_mst_encoder(struct
> > intel_digital_port *intel_dig_port, enum
> > intel_encoder->type = INTEL_OUTPUT_DP_MST;
> > intel_encoder->power_domain = intel_dig_port-
> > >base.power_domain;
> > intel_encoder->port = intel_dig_port->base.port;
> > - intel_encoder->crtc_mask = 0x7;
> > + intel_encoder->crtc_mask = BIT(pipe);
> > intel_encoder->cloneable = 0;
> >
> > intel_encoder->compute_config =
> > intel_dp_mst_compute_config;
> > diff --git a/drivers/gpu/drm/i915/intel_dvo.c
> > b/drivers/gpu/drm/i915/intel_dvo.c
> > index 754baa0..9de8615 100644
> > --- a/drivers/gpu/drm/i915/intel_dvo.c
> > +++ b/drivers/gpu/drm/i915/intel_dvo.c
> > @@ -500,7 +500,7 @@ void intel_dvo_init(struct drm_i915_private
> > *dev_priv)
> > intel_encoder->type = INTEL_OUTPUT_DVO;
> > intel_encoder->power_domain =
> > POWER_DOMAIN_PORT_OTHER;
> > intel_encoder->port = port;
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B);
> >
> > switch (dvo->type) {
> > case INTEL_DVO_CHIP_TMDS:
> > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> > b/drivers/gpu/drm/i915/intel_hdmi.c
> > index bced7b9..75f2b7a 100644
> > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > @@ -2124,11 +2124,11 @@ void intel_hdmi_init(struct
> > drm_i915_private *dev_priv,
> > intel_encoder->port = port;
> > if (IS_CHERRYVIEW(dev_priv)) {
> > if (port == PORT_D)
> > - intel_encoder->crtc_mask = 1 << 2;
> > + intel_encoder->crtc_mask = BIT(PIPE_C);
> > else
> > - intel_encoder->crtc_mask = (1 << 0) | (1
> > << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B);
> > } else {
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) |
> > (1 << 2);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B) | BIT(PIPE_C);
> > }
> > intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
> > /*
> > diff --git a/drivers/gpu/drm/i915/intel_lvds.c
> > b/drivers/gpu/drm/i915/intel_lvds.c
> > index ef80499..7b0f9519 100644
> > --- a/drivers/gpu/drm/i915/intel_lvds.c
> > +++ b/drivers/gpu/drm/i915/intel_lvds.c
> > @@ -1026,11 +1026,11 @@ void intel_lvds_init(struct
> > drm_i915_private *dev_priv)
> > intel_encoder->port = PORT_NONE;
> > intel_encoder->cloneable = 0;
> > if (HAS_PCH_SPLIT(dev_priv))
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1) |
> > (1 << 2);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B) | BIT(PIPE_C);
> > else if (IS_GEN4(dev_priv))
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) |
> > BIT(PIPE_B);
> > else
> > - intel_encoder->crtc_mask = (1 << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_B);
> >
> > drm_connector_helper_add(connector,
> > &intel_lvds_connector_helper_funcs);
> > connector->display_info.subpixel_order =
> > SubPixelHorizontalRGB;
> > diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
> > b/drivers/gpu/drm/i915/intel_sdvo.c
> > index 2b87648..3c568f6 100644
> > --- a/drivers/gpu/drm/i915/intel_sdvo.c
> > +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> > @@ -2697,7 +2697,7 @@ intel_sdvo_output_setup(struct intel_sdvo
> > *intel_sdvo, uint16_t flags)
> > bytes[0], bytes[1]);
> > return false;
> > }
> > - intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 <<
> > 2);
> > + intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) |
> > BIT(PIPE_C);
> >
> > return true;
> > }
> > diff --git a/drivers/gpu/drm/i915/intel_tv.c
> > b/drivers/gpu/drm/i915/intel_tv.c
> > index b3dabc2..3b65197 100644
> > --- a/drivers/gpu/drm/i915/intel_tv.c
> > +++ b/drivers/gpu/drm/i915/intel_tv.c
> > @@ -1542,9 +1542,9 @@ intel_tv_init(struct drm_i915_private
> > *dev_priv)
> > intel_encoder->type = INTEL_OUTPUT_TVOUT;
> > intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
> > intel_encoder->port = PORT_NONE;
> > - intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> > + intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
> > intel_encoder->cloneable = 0;
> > - intel_encoder->base.possible_crtcs = ((1 << 0) | (1 <<
> > 1));
> > + intel_encoder->base.possible_crtcs = BIT(PIPE_A) |
> > BIT(PIPE_B);
> > intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
> >
> > /* BIOS margin values */
--
Mika Kahola - Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-12-19 8:15 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-13 9:25 [PATCH v2] drm/i915: Generalize definition for crtc mask Mika Kahola
2017-12-13 9:42 ` ✓ Fi.CI.BAT: success for drm/i915: Generalize definition for crtc mask (rev2) Patchwork
2017-12-13 10:32 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-12-19 0:05 ` [PATCH v2] drm/i915: Generalize definition for crtc mask Rodrigo Vivi
2017-12-19 8:16 ` Mika Kahola
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