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* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-01-31 21:43 Walker, Benjamin
  0 siblings, 0 replies; 19+ messages in thread
From: Walker, Benjamin @ 2018-01-31 21:43 UTC (permalink / raw)
  To: spdk

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On Wed, 2018-01-31 at 20:08 +0000, Stephen  Bates wrote:
> I am not opposed to this but I would like others to chime in on this approach.
> It does involve two function calls rather than one which complicates life for
> the user. Does anyone else have opinion on this? I did like the way "improved"
> spdk_mem_register to accomodate this new class of memory region rather than
> add a separate function.
> 
> I am going to give it a few more days for others to review and comment on this
> and other aspects of the patch series and then I will resubmit.
> 

I've been mulling this over for a few days and now I believe I see a strategy
that's going to simplify this a lot. First, a little bit of background.

The function spdk_mem_register registers a virtual address with *all* SPDK
memory translation tables. The system is set up to track an arbitrarily large
number - in fact user code can create their own translation tables if they want.
In practice, there are two important ones:

1) The va to pa translation table (or va to iova if IOMMU is enabled). This one
is created automatically by the env layer.
2) The va to RDMA lkey translation table. This one is created if you're using
NVMe-oF in some form.

When spdk_mem_register is called, it loops through all existing translation
tables and calls a function pointer on each to notify them that a new virtual
address is registered. That function pointer is responsible for determining the
appropriate mapping of that virtual address and setting the appropriate
translation.

The first patch in your series alters spdk_mem_register so that it has an
optional second argument (paddr). But that doesn't make sense - only one of the
tables knows what a physical address is. What we really want to do is change the
code so that the notify function in the code managing the va to pa table can
correctly identify the pa for the given va when the va is a BAR. That function
is spdk_vtophys_notify() in lib/env_dpdk/vtophys.c.

Right now spdk_vtophys_notify() first attempts to look up a virtual address in
DPDK's list of known allocated hugepages (it has translations pre-stored in that
list). If that fails (and there is no IOMMU), the code falls back to scanning
/proc/self/pagemap in sysfs. Is the correct translation from va to pa for the
BAR present in /proc/self/pagemap? I would have guessed that it was, but I'll
assume you already tried this and it wasn't (but I'll test it myself once I get
a device with CMB plugged in to my machine).

If the address translation isn't available in /proc/self/pagemap, we can add a
step in between looking up the va in DPDK's hugepages and scanning
/proc/self/pagemap that iterates through all attached PCI devices and checks if
the va is in the range of one of their BARs. There is a facility for iterating
the devices already - FOREACH_DEVICE_ON_PCIBUS, which iterates over structures
that contain an array named "mem_resource" where the index is the BAR number and
each element is this:

struct rte_mem_resource {
	uint64_t phys_addr; /**< Physical address, 0 if not resource. */
	uint64_t len;       /**< Length of the resource. */
	void *addr;         /**< Virtual address, NULL when not mapped. */
};

I think that's the right way to approach this. I know that when you call
spdk_mem_register, you have the physical address sitting there, so on the
surface this seems much less efficient. But it keeps our nice delineation
between the roles and responsibilities of the software stack such that
spdk_mem_register is entirely unaffected - just the code that is in charge of
managing specifically the va to pa map is modified (vtophys.c). The CMB is also
going to be automatically registered with RDMA NICs for NVMe-oF as well.

I haven't thought as deeply about the rest of the patches, but they look fine to
me right now. I think this is going to be pretty neat!

Thanks,
Ben

^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-09  0:29 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-09  0:29 UTC (permalink / raw)
  To: spdk

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>> Thanks Stephen – v3 is running through the test pool now.
>I see that but something looks very wrong. Everything is failing which is odd as my local testing seemed to work fine?
  
Oh I see the issue. We are still doing the + when the returned value is SPDK_VTOPHYS_ERROR. That is not going to fly. We are going to need to test for that case and not do the addition. I will push a fix. Sorry for the churn.

Stephen
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-09  0:07 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-09  0:07 UTC (permalink / raw)
  To: spdk

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> Thanks Stephen – v3 is running through the test pool now.

I see that but something looks very wrong. Everything is failing which is odd as my local testing seemed to work fine? 
    
> For cmb_copy – I’m OK with that limitation.  If user does specify the same controller for read and write – what 
> would happen?

As it stands the code would error out as there would end up being on valid write controller. Let me add a check that errors out of the write and read controller are both the same and push that.

Stephen
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08 23:46 Harris, James R
  0 siblings, 0 replies; 19+ messages in thread
From: Harris, James R @ 2018-02-08 23:46 UTC (permalink / raw)
  To: spdk

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On 2/8/18, 4:36 PM, "SPDK on behalf of Stephen  Bates" <spdk-bounces(a)lists.01.org on behalf of sbates(a)raithlin.com> wrote:

    >> Overall the patch series looks good – I just reviewed the whole patch series and added some comments.
    
  Hi All. V3 of this series is now posted. Jim I addressed all your concerns bar one. I would like to keep the cmb_copy example for copying between two distinct controllers for now.  We can either add another example or extend this one in the future for copies within one controller.


Thanks Stephen – v3 is running through the test pool now.

For cmb_copy – I’m OK with that limitation.  If user does specify the same controller for read and write – what would happen?

-Jim
 


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08 23:36 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-08 23:36 UTC (permalink / raw)
  To: spdk

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>> Overall the patch series looks good – I just reviewed the whole patch series and added some comments.

Hi All. V3 of this series is now posted. Jim I addressed all your concerns bar one. I would like to keep the cmb_copy example for copying between two distinct controllers for now.  We can either add another example or extend this one in the future for copies within one controller.

Stephen
 


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08  5:17 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-08  5:17 UTC (permalink / raw)
  To: spdk

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>  Sorry for the unrelated test failure – as expected it passed the second time.

No worries. That's what CI is for ;-).
    
> Overall the patch series looks good – I just reviewed the whole patch series and added some comments.  

Thanks for the review Jim! I saw them and responded. I think they all make sense and will address them in a v3.

> Appreciate you taking the time to add the cmb_copy example app!

Got to have an example ;-)...

I'll probably give it another day or two for others to review/comment and then spin v3.

Stephen
    
    
    On 2/7/18, 8:05 PM, "SPDK on behalf of Liu, Changpeng" <spdk-bounces(a)lists.01.org on behalf of changpeng.liu(a)intel.com> wrote:
    
        Hi Stephen,
        
        I removed the -1 label, will start a new round test soon.
        
        > -----Original Message-----
        > From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
        > Sent: Thursday, February 8, 2018 10:35 AM
        > To: Storage Performance Development Kit <spdk(a)lists.01.org>
        > Subject: Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
        > 
        > > My v2 for the NVMe CMB WDS/RDS enablement is now up for review.
        > 
        > So I see my v2 series got pulled into the CI system. It *looks* like an unrelated
        > change is causing one test system to fail. I don't think my changes are causing
        > this failure but I'd appreciate it if someone with more experience could check
        > that.
        > 
        > https://ci.spdk.io/spdk/builds/review/d70dda617b40d8c099eef8313f5b959c0153
        > 0d3e.1518046779/fedora-08/
        > 
        > This is the 3rd patch in the 5 patch series. I see patches 4 and 5 are getting clean
        > bills of health for the same tests. Does the CI tool apply each patch in turn and
        > then run its tests (I assume it must as patches 4 and 5 depend on the prior
        > patches).
        > 
        > Cheers
        > 
        > Stephen
        > 
        > 
        > 
        > _______________________________________________
        > SPDK mailing list
        > SPDK(a)lists.01.org
        > https://lists.01.org/mailman/listinfo/spdk
        _______________________________________________
        SPDK mailing list
        SPDK(a)lists.01.org
        https://lists.01.org/mailman/listinfo/spdk
        
    
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08  5:07 Harris, James R
  0 siblings, 0 replies; 19+ messages in thread
From: Harris, James R @ 2018-02-08  5:07 UTC (permalink / raw)
  To: spdk

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Hey Stephen,

Sorry for the unrelated test failure – as expected it passed the second time.

Overall the patch series looks good – I just reviewed the whole patch series and added some comments.  Appreciate you taking the time to add the cmb_copy example app!

Thanks,

-Jim


On 2/7/18, 8:05 PM, "SPDK on behalf of Liu, Changpeng" <spdk-bounces(a)lists.01.org on behalf of changpeng.liu(a)intel.com> wrote:

    Hi Stephen,
    
    I removed the -1 label, will start a new round test soon.
    
    > -----Original Message-----
    > From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
    > Sent: Thursday, February 8, 2018 10:35 AM
    > To: Storage Performance Development Kit <spdk(a)lists.01.org>
    > Subject: Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
    > 
    > > My v2 for the NVMe CMB WDS/RDS enablement is now up for review.
    > 
    > So I see my v2 series got pulled into the CI system. It *looks* like an unrelated
    > change is causing one test system to fail. I don't think my changes are causing
    > this failure but I'd appreciate it if someone with more experience could check
    > that.
    > 
    > https://ci.spdk.io/spdk/builds/review/d70dda617b40d8c099eef8313f5b959c0153
    > 0d3e.1518046779/fedora-08/
    > 
    > This is the 3rd patch in the 5 patch series. I see patches 4 and 5 are getting clean
    > bills of health for the same tests. Does the CI tool apply each patch in turn and
    > then run its tests (I assume it must as patches 4 and 5 depend on the prior
    > patches).
    > 
    > Cheers
    > 
    > Stephen
    > 
    > 
    > 
    > _______________________________________________
    > SPDK mailing list
    > SPDK(a)lists.01.org
    > https://lists.01.org/mailman/listinfo/spdk
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08  3:05 Liu, Changpeng
  0 siblings, 0 replies; 19+ messages in thread
From: Liu, Changpeng @ 2018-02-08  3:05 UTC (permalink / raw)
  To: spdk

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Hi Stephen,

I removed the -1 label, will start a new round test soon.

> -----Original Message-----
> From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
> Sent: Thursday, February 8, 2018 10:35 AM
> To: Storage Performance Development Kit <spdk(a)lists.01.org>
> Subject: Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
> 
> > My v2 for the NVMe CMB WDS/RDS enablement is now up for review.
> 
> So I see my v2 series got pulled into the CI system. It *looks* like an unrelated
> change is causing one test system to fail. I don't think my changes are causing
> this failure but I'd appreciate it if someone with more experience could check
> that.
> 
> https://ci.spdk.io/spdk/builds/review/d70dda617b40d8c099eef8313f5b959c0153
> 0d3e.1518046779/fedora-08/
> 
> This is the 3rd patch in the 5 patch series. I see patches 4 and 5 are getting clean
> bills of health for the same tests. Does the CI tool apply each patch in turn and
> then run its tests (I assume it must as patches 4 and 5 depend on the prior
> patches).
> 
> Cheers
> 
> Stephen
> 
> 
> 
> _______________________________________________
> SPDK mailing list
> SPDK(a)lists.01.org
> https://lists.01.org/mailman/listinfo/spdk

^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-08  2:35 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-08  2:35 UTC (permalink / raw)
  To: spdk

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> My v2 for the NVMe CMB WDS/RDS enablement is now up for review. 

So I see my v2 series got pulled into the CI system. It *looks* like an unrelated change is causing one test system to fail. I don't think my changes are causing this failure but I'd appreciate it if someone with more experience could check that.

https://ci.spdk.io/spdk/builds/review/d70dda617b40d8c099eef8313f5b959c01530d3e.1518046779/fedora-08/

This is the 3rd patch in the 5 patch series. I see patches 4 and 5 are getting clean bills of health for the same tests. Does the CI tool apply each patch in turn and then run its tests (I assume it must as patches 4 and 5 depend on the prior patches).

Cheers

Stephen




^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-07 23:18 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-07 23:18 UTC (permalink / raw)
  To: spdk

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 Hi All

My v2 for the NVMe CMB WDS/RDS enablement is now up for review. Thanks to Jim, Daniel, Ben and Darius for their very useful input. This v2 is a lot cleaner than v1 thanks to input from Darius and Ben that cleaned up how we do the vtophys lookups for CMBs.

I have tested this new series on our hardware and it works great. Any more input or testing appreciated! The new code is mostly in this patch:

https://review.gerrithub.io/#/c/398872/

Stephen



^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-07 18:53 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-07 18:53 UTC (permalink / raw)
  To: spdk

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>  Looked through your patch set on GitHub – overall it looks great!

Thanks Jim!
    
> The NVMe CMB patch (#2 in your series) does some math to ensure only a 2MiB-aligned buffer is registered – with 
> that in place, could we still enforce 2MiB alignment then in the vtophys notify code path (#1 in your series)?

No. The check in the NVMe code is for the alignment of the virtual address. However we cannot guarantee the physical address 2MB alignment lines up with the virtual address 2MB alignment (mmap cannot assure this condition). So we have to drop that paddr check in the vtophys notify code for PCI mapped memory.
    
Stephen
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-07  0:20 Harris, James R
  0 siblings, 0 replies; 19+ messages in thread
From: Harris, James R @ 2018-02-07  0:20 UTC (permalink / raw)
  To: spdk

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Hi Stephen,

Looked through your patch set on GitHub – overall it looks great!

The NVMe CMB patch (#2 in your series) does some math to ensure only a 2MiB-aligned buffer is registered – with that in place, could we still enforce 2MiB alignment then in the vtophys notify code path (#1 in your series)?

I’ll add this comment in your GitHub patch too – it might be clearer there what I’m talking about.

Thanks,

-Jim


On 2/5/18, 8:06 PM, "SPDK on behalf of Stephen  Bates" <spdk-bounces(a)lists.01.org on behalf of sbates(a)raithlin.com> wrote:

    Hi Ben et al
    
    Well you suggestions simplified the series quite a bit! Our lab is getting upgraded so I have not tested the new series yet. I plan to submit after I do some testing. However if people are interested you can see the new series here [1]. Things are much simpler now and feedback now or after submission is welcome. The major change to v1 is in the first patch of the new series [2].
    
    https://github.com/Eideticom/spdk/commits/cmb-copy-v5
    
    BTW since there are commits that I dropped from v1 do I regenerate new Ids for this series or do I use the ones that I had plus the new Id for the new initial commit?
    
    Cheers
     
    Stephen
    
    [1] https://github.com/Eideticom/spdk/commits/cmb-copy-v5
    [2] https://github.com/Eideticom/spdk/commit/ac92507f38105e9fb9cf35df20dde8bb4b78333f
     
    
    On 2018-01-31, 2:43 PM, "SPDK on behalf of Walker, Benjamin" <spdk-bounces(a)lists.01.org on behalf of benjamin.walker(a)intel.com> wrote:
    
        On Wed, 2018-01-31 at 20:08 +0000, Stephen  Bates wrote:
        > I am not opposed to this but I would like others to chime in on this approach.
        > It does involve two function calls rather than one which complicates life for
        > the user. Does anyone else have opinion on this? I did like the way "improved"
        > spdk_mem_register to accomodate this new class of memory region rather than
        > add a separate function.
        > 
        > I am going to give it a few more days for others to review and comment on this
        > and other aspects of the patch series and then I will resubmit.
        > 
        
        I've been mulling this over for a few days and now I believe I see a strategy
        that's going to simplify this a lot. First, a little bit of background.
        
        The function spdk_mem_register registers a virtual address with *all* SPDK
        memory translation tables. The system is set up to track an arbitrarily large
        number - in fact user code can create their own translation tables if they want.
        In practice, there are two important ones:
        
        1) The va to pa translation table (or va to iova if IOMMU is enabled). This one
        is created automatically by the env layer.
        2) The va to RDMA lkey translation table. This one is created if you're using
        NVMe-oF in some form.
        
        When spdk_mem_register is called, it loops through all existing translation
        tables and calls a function pointer on each to notify them that a new virtual
        address is registered. That function pointer is responsible for determining the
        appropriate mapping of that virtual address and setting the appropriate
        translation.
        
        The first patch in your series alters spdk_mem_register so that it has an
        optional second argument (paddr). But that doesn't make sense - only one of the
        tables knows what a physical address is. What we really want to do is change the
        code so that the notify function in the code managing the va to pa table can
        correctly identify the pa for the given va when the va is a BAR. That function
        is spdk_vtophys_notify() in lib/env_dpdk/vtophys.c.
        
        Right now spdk_vtophys_notify() first attempts to look up a virtual address in
        DPDK's list of known allocated hugepages (it has translations pre-stored in that
        list). If that fails (and there is no IOMMU), the code falls back to scanning
        /proc/self/pagemap in sysfs. Is the correct translation from va to pa for the
        BAR present in /proc/self/pagemap? I would have guessed that it was, but I'll
        assume you already tried this and it wasn't (but I'll test it myself once I get
        a device with CMB plugged in to my machine).
        
        If the address translation isn't available in /proc/self/pagemap, we can add a
        step in between looking up the va in DPDK's hugepages and scanning
        /proc/self/pagemap that iterates through all attached PCI devices and checks if
        the va is in the range of one of their BARs. There is a facility for iterating
        the devices already - FOREACH_DEVICE_ON_PCIBUS, which iterates over structures
        that contain an array named "mem_resource" where the index is the BAR number and
        each element is this:
        
        struct rte_mem_resource {
        	uint64_t phys_addr; /**< Physical address, 0 if not resource. */
        	uint64_t len;       /**< Length of the resource. */
        	void *addr;         /**< Virtual address, NULL when not mapped. */
        };
        
        I think that's the right way to approach this. I know that when you call
        spdk_mem_register, you have the physical address sitting there, so on the
        surface this seems much less efficient. But it keeps our nice delineation
        between the roles and responsibilities of the software stack such that
        spdk_mem_register is entirely unaffected - just the code that is in charge of
        managing specifically the va to pa map is modified (vtophys.c). The CMB is also
        going to be automatically registered with RDMA NICs for NVMe-oF as well.
        
        I haven't thought as deeply about the rest of the patches, but they look fine to
        me right now. I think this is going to be pretty neat!
        
        Thanks,
        Ben
        _______________________________________________
        SPDK mailing list
        SPDK(a)lists.01.org
        https://lists.01.org/mailman/listinfo/spdk
        
    
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-06  4:05 Harris, James R
  0 siblings, 0 replies; 19+ messages in thread
From: Harris, James R @ 2018-02-06  4:05 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 6255 bytes --]

Thanks Stephen!  You can keep the old change IDs for any patches that were modified but not dropped.  For the dropped patches, you can go into Gerrit and hit the Abandon button – then they won’t show up anymore in Gerrit patch lists.

-Jim


On 2/5/18, 8:06 PM, "SPDK on behalf of Stephen  Bates" <spdk-bounces(a)lists.01.org on behalf of sbates(a)raithlin.com> wrote:

    Hi Ben et al
    
    Well you suggestions simplified the series quite a bit! Our lab is getting upgraded so I have not tested the new series yet. I plan to submit after I do some testing. However if people are interested you can see the new series here [1]. Things are much simpler now and feedback now or after submission is welcome. The major change to v1 is in the first patch of the new series [2].
    
    https://github.com/Eideticom/spdk/commits/cmb-copy-v5
    
    BTW since there are commits that I dropped from v1 do I regenerate new Ids for this series or do I use the ones that I had plus the new Id for the new initial commit?
    
    Cheers
     
    Stephen
    
    [1] https://github.com/Eideticom/spdk/commits/cmb-copy-v5
    [2] https://github.com/Eideticom/spdk/commit/ac92507f38105e9fb9cf35df20dde8bb4b78333f
     
    
    On 2018-01-31, 2:43 PM, "SPDK on behalf of Walker, Benjamin" <spdk-bounces(a)lists.01.org on behalf of benjamin.walker(a)intel.com> wrote:
    
        On Wed, 2018-01-31 at 20:08 +0000, Stephen  Bates wrote:
        > I am not opposed to this but I would like others to chime in on this approach.
        > It does involve two function calls rather than one which complicates life for
        > the user. Does anyone else have opinion on this? I did like the way "improved"
        > spdk_mem_register to accomodate this new class of memory region rather than
        > add a separate function.
        > 
        > I am going to give it a few more days for others to review and comment on this
        > and other aspects of the patch series and then I will resubmit.
        > 
        
        I've been mulling this over for a few days and now I believe I see a strategy
        that's going to simplify this a lot. First, a little bit of background.
        
        The function spdk_mem_register registers a virtual address with *all* SPDK
        memory translation tables. The system is set up to track an arbitrarily large
        number - in fact user code can create their own translation tables if they want.
        In practice, there are two important ones:
        
        1) The va to pa translation table (or va to iova if IOMMU is enabled). This one
        is created automatically by the env layer.
        2) The va to RDMA lkey translation table. This one is created if you're using
        NVMe-oF in some form.
        
        When spdk_mem_register is called, it loops through all existing translation
        tables and calls a function pointer on each to notify them that a new virtual
        address is registered. That function pointer is responsible for determining the
        appropriate mapping of that virtual address and setting the appropriate
        translation.
        
        The first patch in your series alters spdk_mem_register so that it has an
        optional second argument (paddr). But that doesn't make sense - only one of the
        tables knows what a physical address is. What we really want to do is change the
        code so that the notify function in the code managing the va to pa table can
        correctly identify the pa for the given va when the va is a BAR. That function
        is spdk_vtophys_notify() in lib/env_dpdk/vtophys.c.
        
        Right now spdk_vtophys_notify() first attempts to look up a virtual address in
        DPDK's list of known allocated hugepages (it has translations pre-stored in that
        list). If that fails (and there is no IOMMU), the code falls back to scanning
        /proc/self/pagemap in sysfs. Is the correct translation from va to pa for the
        BAR present in /proc/self/pagemap? I would have guessed that it was, but I'll
        assume you already tried this and it wasn't (but I'll test it myself once I get
        a device with CMB plugged in to my machine).
        
        If the address translation isn't available in /proc/self/pagemap, we can add a
        step in between looking up the va in DPDK's hugepages and scanning
        /proc/self/pagemap that iterates through all attached PCI devices and checks if
        the va is in the range of one of their BARs. There is a facility for iterating
        the devices already - FOREACH_DEVICE_ON_PCIBUS, which iterates over structures
        that contain an array named "mem_resource" where the index is the BAR number and
        each element is this:
        
        struct rte_mem_resource {
        	uint64_t phys_addr; /**< Physical address, 0 if not resource. */
        	uint64_t len;       /**< Length of the resource. */
        	void *addr;         /**< Virtual address, NULL when not mapped. */
        };
        
        I think that's the right way to approach this. I know that when you call
        spdk_mem_register, you have the physical address sitting there, so on the
        surface this seems much less efficient. But it keeps our nice delineation
        between the roles and responsibilities of the software stack such that
        spdk_mem_register is entirely unaffected - just the code that is in charge of
        managing specifically the va to pa map is modified (vtophys.c). The CMB is also
        going to be automatically registered with RDMA NICs for NVMe-oF as well.
        
        I haven't thought as deeply about the rest of the patches, but they look fine to
        me right now. I think this is going to be pretty neat!
        
        Thanks,
        Ben
        _______________________________________________
        SPDK mailing list
        SPDK(a)lists.01.org
        https://lists.01.org/mailman/listinfo/spdk
        
    
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-06  3:06 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-06  3:06 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 5336 bytes --]

Hi Ben et al

Well you suggestions simplified the series quite a bit! Our lab is getting upgraded so I have not tested the new series yet. I plan to submit after I do some testing. However if people are interested you can see the new series here [1]. Things are much simpler now and feedback now or after submission is welcome. The major change to v1 is in the first patch of the new series [2].

https://github.com/Eideticom/spdk/commits/cmb-copy-v5

BTW since there are commits that I dropped from v1 do I regenerate new Ids for this series or do I use the ones that I had plus the new Id for the new initial commit?

Cheers
 
Stephen

[1] https://github.com/Eideticom/spdk/commits/cmb-copy-v5
[2] https://github.com/Eideticom/spdk/commit/ac92507f38105e9fb9cf35df20dde8bb4b78333f
 

On 2018-01-31, 2:43 PM, "SPDK on behalf of Walker, Benjamin" <spdk-bounces(a)lists.01.org on behalf of benjamin.walker(a)intel.com> wrote:

    On Wed, 2018-01-31 at 20:08 +0000, Stephen  Bates wrote:
    > I am not opposed to this but I would like others to chime in on this approach.
    > It does involve two function calls rather than one which complicates life for
    > the user. Does anyone else have opinion on this? I did like the way "improved"
    > spdk_mem_register to accomodate this new class of memory region rather than
    > add a separate function.
    > 
    > I am going to give it a few more days for others to review and comment on this
    > and other aspects of the patch series and then I will resubmit.
    > 
    
    I've been mulling this over for a few days and now I believe I see a strategy
    that's going to simplify this a lot. First, a little bit of background.
    
    The function spdk_mem_register registers a virtual address with *all* SPDK
    memory translation tables. The system is set up to track an arbitrarily large
    number - in fact user code can create their own translation tables if they want.
    In practice, there are two important ones:
    
    1) The va to pa translation table (or va to iova if IOMMU is enabled). This one
    is created automatically by the env layer.
    2) The va to RDMA lkey translation table. This one is created if you're using
    NVMe-oF in some form.
    
    When spdk_mem_register is called, it loops through all existing translation
    tables and calls a function pointer on each to notify them that a new virtual
    address is registered. That function pointer is responsible for determining the
    appropriate mapping of that virtual address and setting the appropriate
    translation.
    
    The first patch in your series alters spdk_mem_register so that it has an
    optional second argument (paddr). But that doesn't make sense - only one of the
    tables knows what a physical address is. What we really want to do is change the
    code so that the notify function in the code managing the va to pa table can
    correctly identify the pa for the given va when the va is a BAR. That function
    is spdk_vtophys_notify() in lib/env_dpdk/vtophys.c.
    
    Right now spdk_vtophys_notify() first attempts to look up a virtual address in
    DPDK's list of known allocated hugepages (it has translations pre-stored in that
    list). If that fails (and there is no IOMMU), the code falls back to scanning
    /proc/self/pagemap in sysfs. Is the correct translation from va to pa for the
    BAR present in /proc/self/pagemap? I would have guessed that it was, but I'll
    assume you already tried this and it wasn't (but I'll test it myself once I get
    a device with CMB plugged in to my machine).
    
    If the address translation isn't available in /proc/self/pagemap, we can add a
    step in between looking up the va in DPDK's hugepages and scanning
    /proc/self/pagemap that iterates through all attached PCI devices and checks if
    the va is in the range of one of their BARs. There is a facility for iterating
    the devices already - FOREACH_DEVICE_ON_PCIBUS, which iterates over structures
    that contain an array named "mem_resource" where the index is the BAR number and
    each element is this:
    
    struct rte_mem_resource {
    	uint64_t phys_addr; /**< Physical address, 0 if not resource. */
    	uint64_t len;       /**< Length of the resource. */
    	void *addr;         /**< Virtual address, NULL when not mapped. */
    };
    
    I think that's the right way to approach this. I know that when you call
    spdk_mem_register, you have the physical address sitting there, so on the
    surface this seems much less efficient. But it keeps our nice delineation
    between the roles and responsibilities of the software stack such that
    spdk_mem_register is entirely unaffected - just the code that is in charge of
    managing specifically the va to pa map is modified (vtophys.c). The CMB is also
    going to be automatically registered with RDMA NICs for NVMe-oF as well.
    
    I haven't thought as deeply about the rest of the patches, but they look fine to
    me right now. I think this is going to be pretty neat!
    
    Thanks,
    Ben
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-02-01 22:04 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-02-01 22:04 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 2858 bytes --]

>> I am going to give it a few more days for others to review and comment on this
>> and other aspects of the patch series and then I will resubmit.
    
>    I've been mulling this over for a few days and now I believe I see a strategy
>   that's going to simplify this a lot. First, a little bit of background.

Thanks for taking a look at this Ben! I really like your approach and will work on a respin based on this. I do have a couple of comments inline below...
        
>    The first patch in your series alters spdk_mem_register so that it has an
>    optional second argument (paddr). But that doesn't make sense - only one of the
>    tables knows what a physical address is. What we really want to do is change the
>    code so that the notify function in the code managing the va to pa table can
>    correctly identify the pa for the given va when the va is a BAR. That function
>    is spdk_vtophys_notify() in lib/env_dpdk/vtophys.c.

Great! I did feel there had to be a cleaner way to do this. 
    
> Is the correct translation from va to pa for the BAR present in /proc/self/pagemap?

No. I *think* /proc/self/pagemap only contains translations for memory that has a struct page backing and in upstream Linux this is not true for IO memory like PCIe BARs. So they do not appear in pagemap. I certainly did check this but if you can confirm you see the same I'd appreciate it. Note you can even do a simple check by mmaping any BAR into a user-space program and dumping its pagemap so you don't need a CMB enabled NVMe SSD to test this part.
    
> There is a facility for iterating the devices already - FOREACH_DEVICE_ON_PCIBUS, which iterates over structures

Perfect!
        
>    I think that's the right way to approach this. I know that when you call
>    spdk_mem_register, you have the physical address sitting there, so on the
>    surface this seems much less efficient. But it keeps our nice delineation
>    between the roles and responsibilities of the software stack such that
>    spdk_mem_register is entirely unaffected - just the code that is in charge of
>    managing specifically the va to pa map is modified (vtophys.c). The CMB is also
>   going to be automatically registered with RDMA NICs for NVMe-oF as well.

I like this demarcation and the fact it will tie into the fabrics side of things is great as I think this is an obvious next step for CMB/PMR enabled NVMe SSDs.
    
 > I haven't thought as deeply about the rest of the patches, but they look fine to
 > me right now. I think this is going to be pretty neat!

OK. I will give it a few more days to get more feedback but I will incorporate all of this into my v2 which I will probably start working on next week. Thanks again for all the useful input. I agree this will be a nice feature to have!

Stephen    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-01-31 20:14 Harris, James R
  0 siblings, 0 replies; 19+ messages in thread
From: Harris, James R @ 2018-01-31 20:14 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 5375 bytes --]



On 1/31/18, 1:08 PM, "Stephen  Bates" <sbates(a)raithlin.com> wrote:

    > I've done some initial review on your patches. Your NVMe changes look fine to me - but I'm not the one to review that.
    
    Thanks a lot for the prompt review Darius! 
    
    > I have some comments regarding your memory management refactor. I posted all of them on a single patch - 
    > https://review.gerrithub.io/c/397038/
    
    I have put some replies on Gerrit. I think your comments are good and I will include them in v2.
    
    > I'm thinking the g_phys_regions could be a global vtophys override map.     We could expose public 
    > spdk_vtophys_override(vaddr, len, paddr) API -> then we wouldn't need to modify spdk_mem_register.
    
    I am not opposed to this but I would like others to chime in on this approach. It does involve two function calls rather than one which complicates life for the user. Does anyone else have opinion on this? I did like the way "improved" spdk_mem_register to accomodate this new class of memory region rather than add a separate function.
    
    I am going to give it a few more days for others to review and comment on this and other aspects of the patch series and then I will resubmit.
    
  Is there any chance a core maintainer can pull these into the CI environment so I can see if there are any other issues I need to be aware off before the respin?

Hi Stephen,

Sorry – we’ve been heads down for the upcoming 18.01 release so I haven’t been looking at any patches that aren’t related to that.  I’ll start pushing your patches through the test pool though to see if anything else pops up.

-Jim

    
    Cheers
     
    Stephen
    
    
    On 2018-01-30, 1:45 AM, "SPDK on behalf of Stojaczyk, DariuszX" <spdk-bounces(a)lists.01.org on behalf of dariuszx.stojaczyk(a)intel.com> wrote:
    
        Hi Stephen,
        I've done some initial review on your patches. Your NVMe changes look fine to me - but I'm not the one to review that.
        I have some comments regarding your memory management refactor. I posted all of them on a single patch - https://review.gerrithub.io/c/397038/
        Basically:
        
        ```
        I'm thinking the g_phys_regions could be a global vtophys override map.
        We could expose public spdk_vtophys_override(vaddr, len, paddr) API -> then we wouldn't need to modify spdk_mem_register.
        
        NVMe could do:
        spdk_vtophys_override(cmb_vaddr, len, cmb_paddr);
        spdk_mem_register(cmb_vaddr, len);
        ```
        
        Regards,
        D.
        
        > -----Original Message-----
        > From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
        > Sent: Tuesday, January 30, 2018 4:35 AM
        > To: Storage Performance Development Kit <spdk(a)lists.01.org>
        > Subject: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
        > 
        > Hi All
        > 
        > I just uploaded a patchset to Gerrit that adds support for NVMe controllers with
        > CMBs/PMRs that support WDS and RDS (my full branch of the code is at [1]).
        > This allows NVMe controllers to move/copy data from a namespace on one
        > controller to a namespace on a different controller without requiring a system
        > memory buffer. There are lots of interesting use cases for such data-
        > movement.
        > 
        > The biggest issue with using a CMB or PMR for data copies is getting a vtophys
        > translation. This series adds a new vtophys method for physical memory
        > regions that fail via the existing methods (e.g. a PCIe BAR). This new method
        > using a linked list of physical regions that can be added/deleted via
        > spdk_reg_memory calls. We can then allocate/free memory from these
        > regions and the current maps can handle both the reference counting and store
        > the vtophys translations.
        > 
        > The hello_world example is updated to utilize the CMB WDS/RDS capability if
        > the associated controller supports it. It addition a new example application
        > called cmb_copy is included that performs the aforementioned offloaded copy
        > when a CMB is available.
        > 
        > We have confirmed both cmb_copy and the new hello_world work as expected
        > on both hardware from Eiditicom and Everspin. We plan to do more testing as
        > more drives with WDS/RDS capable CMBs become available. We used PCIe
        > packet counters in the Microsemi PCIe switch to confirm traffic is moving
        > directly between the two NVMe SSDs and not being routed to the root complex
        > on the CPU.
        > 
        > Feedback on the patches is gratefully received!
        > 
        > Cheers
        > 
        > Stephen
        > 
        > [1] https://github.com/Eideticom/spdk/tree/cmb-copy-v3
        > 
        > _______________________________________________
        > SPDK mailing list
        > SPDK(a)lists.01.org
        > https://lists.01.org/mailman/listinfo/spdk
        _______________________________________________
        SPDK mailing list
        SPDK(a)lists.01.org
        https://lists.01.org/mailman/listinfo/spdk
        
    
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-01-31 20:08 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-01-31 20:08 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 4652 bytes --]

> I've done some initial review on your patches. Your NVMe changes look fine to me - but I'm not the one to review that.

Thanks a lot for the prompt review Darius! 

> I have some comments regarding your memory management refactor. I posted all of them on a single patch - 
> https://review.gerrithub.io/c/397038/

I have put some replies on Gerrit. I think your comments are good and I will include them in v2.

> I'm thinking the g_phys_regions could be a global vtophys override map.     We could expose public 
> spdk_vtophys_override(vaddr, len, paddr) API -> then we wouldn't need to modify spdk_mem_register.

I am not opposed to this but I would like others to chime in on this approach. It does involve two function calls rather than one which complicates life for the user. Does anyone else have opinion on this? I did like the way "improved" spdk_mem_register to accomodate this new class of memory region rather than add a separate function.

I am going to give it a few more days for others to review and comment on this and other aspects of the patch series and then I will resubmit.

Is there any chance a core maintainer can pull these into the CI environment so I can see if there are any other issues I need to be aware off before the respin?

Cheers
 
Stephen


On 2018-01-30, 1:45 AM, "SPDK on behalf of Stojaczyk, DariuszX" <spdk-bounces(a)lists.01.org on behalf of dariuszx.stojaczyk(a)intel.com> wrote:

    Hi Stephen,
    I've done some initial review on your patches. Your NVMe changes look fine to me - but I'm not the one to review that.
    I have some comments regarding your memory management refactor. I posted all of them on a single patch - https://review.gerrithub.io/c/397038/
    Basically:
    
    ```
    I'm thinking the g_phys_regions could be a global vtophys override map.
    We could expose public spdk_vtophys_override(vaddr, len, paddr) API -> then we wouldn't need to modify spdk_mem_register.
    
    NVMe could do:
    spdk_vtophys_override(cmb_vaddr, len, cmb_paddr);
    spdk_mem_register(cmb_vaddr, len);
    ```
    
    Regards,
    D.
    
    > -----Original Message-----
    > From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
    > Sent: Tuesday, January 30, 2018 4:35 AM
    > To: Storage Performance Development Kit <spdk(a)lists.01.org>
    > Subject: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
    > 
    > Hi All
    > 
    > I just uploaded a patchset to Gerrit that adds support for NVMe controllers with
    > CMBs/PMRs that support WDS and RDS (my full branch of the code is at [1]).
    > This allows NVMe controllers to move/copy data from a namespace on one
    > controller to a namespace on a different controller without requiring a system
    > memory buffer. There are lots of interesting use cases for such data-
    > movement.
    > 
    > The biggest issue with using a CMB or PMR for data copies is getting a vtophys
    > translation. This series adds a new vtophys method for physical memory
    > regions that fail via the existing methods (e.g. a PCIe BAR). This new method
    > using a linked list of physical regions that can be added/deleted via
    > spdk_reg_memory calls. We can then allocate/free memory from these
    > regions and the current maps can handle both the reference counting and store
    > the vtophys translations.
    > 
    > The hello_world example is updated to utilize the CMB WDS/RDS capability if
    > the associated controller supports it. It addition a new example application
    > called cmb_copy is included that performs the aforementioned offloaded copy
    > when a CMB is available.
    > 
    > We have confirmed both cmb_copy and the new hello_world work as expected
    > on both hardware from Eiditicom and Everspin. We plan to do more testing as
    > more drives with WDS/RDS capable CMBs become available. We used PCIe
    > packet counters in the Microsemi PCIe switch to confirm traffic is moving
    > directly between the two NVMe SSDs and not being routed to the root complex
    > on the CPU.
    > 
    > Feedback on the patches is gratefully received!
    > 
    > Cheers
    > 
    > Stephen
    > 
    > [1] https://github.com/Eideticom/spdk/tree/cmb-copy-v3
    > 
    > _______________________________________________
    > SPDK mailing list
    > SPDK(a)lists.01.org
    > https://lists.01.org/mailman/listinfo/spdk
    _______________________________________________
    SPDK mailing list
    SPDK(a)lists.01.org
    https://lists.01.org/mailman/listinfo/spdk
    


^ permalink raw reply	[flat|nested] 19+ messages in thread
* Re: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-01-30  8:45 Stojaczyk, DariuszX
  0 siblings, 0 replies; 19+ messages in thread
From: Stojaczyk, DariuszX @ 2018-01-30  8:45 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 2786 bytes --]

Hi Stephen,
I've done some initial review on your patches. Your NVMe changes look fine to me - but I'm not the one to review that.
I have some comments regarding your memory management refactor. I posted all of them on a single patch - https://review.gerrithub.io/c/397038/
Basically:

```
I'm thinking the g_phys_regions could be a global vtophys override map.
We could expose public spdk_vtophys_override(vaddr, len, paddr) API -> then we wouldn't need to modify spdk_mem_register.

NVMe could do:
spdk_vtophys_override(cmb_vaddr, len, cmb_paddr);
spdk_mem_register(cmb_vaddr, len);
```

Regards,
D.

> -----Original Message-----
> From: SPDK [mailto:spdk-bounces(a)lists.01.org] On Behalf Of Stephen Bates
> Sent: Tuesday, January 30, 2018 4:35 AM
> To: Storage Performance Development Kit <spdk(a)lists.01.org>
> Subject: [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
> 
> Hi All
> 
> I just uploaded a patchset to Gerrit that adds support for NVMe controllers with
> CMBs/PMRs that support WDS and RDS (my full branch of the code is at [1]).
> This allows NVMe controllers to move/copy data from a namespace on one
> controller to a namespace on a different controller without requiring a system
> memory buffer. There are lots of interesting use cases for such data-
> movement.
> 
> The biggest issue with using a CMB or PMR for data copies is getting a vtophys
> translation. This series adds a new vtophys method for physical memory
> regions that fail via the existing methods (e.g. a PCIe BAR). This new method
> using a linked list of physical regions that can be added/deleted via
> spdk_reg_memory calls. We can then allocate/free memory from these
> regions and the current maps can handle both the reference counting and store
> the vtophys translations.
> 
> The hello_world example is updated to utilize the CMB WDS/RDS capability if
> the associated controller supports it. It addition a new example application
> called cmb_copy is included that performs the aforementioned offloaded copy
> when a CMB is available.
> 
> We have confirmed both cmb_copy and the new hello_world work as expected
> on both hardware from Eiditicom and Everspin. We plan to do more testing as
> more drives with WDS/RDS capable CMBs become available. We used PCIe
> packet counters in the Microsemi PCIe switch to confirm traffic is moving
> directly between the two NVMe SSDs and not being routed to the root complex
> on the CPU.
> 
> Feedback on the patches is gratefully received!
> 
> Cheers
> 
> Stephen
> 
> [1] https://github.com/Eideticom/spdk/tree/cmb-copy-v3
> 
> _______________________________________________
> SPDK mailing list
> SPDK(a)lists.01.org
> https://lists.01.org/mailman/listinfo/spdk

^ permalink raw reply	[flat|nested] 19+ messages in thread
* [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS
@ 2018-01-30  3:35 Stephen Bates
  0 siblings, 0 replies; 19+ messages in thread
From: Stephen Bates @ 2018-01-30  3:35 UTC (permalink / raw)
  To: spdk

[-- Attachment #1: Type: text/plain, Size: 1644 bytes --]

Hi All

I just uploaded a patchset to Gerrit that adds support for NVMe controllers with CMBs/PMRs that support WDS and RDS (my full branch of the code is at [1]). This allows NVMe controllers to move/copy data from a namespace on one controller to a namespace on a different controller without requiring a system memory buffer. There are lots of interesting use cases for such data-movement.

The biggest issue with using a CMB or PMR for data copies is getting a vtophys translation. This series adds a new vtophys method for physical memory regions that fail via the existing methods (e.g. a PCIe BAR). This new method using a linked list of physical regions that can be added/deleted via spdk_reg_memory calls. We can then allocate/free memory from these regions and the current maps can handle both the reference counting and store the vtophys translations.

The hello_world example is updated to utilize the CMB WDS/RDS capability if the associated controller supports it. It addition a new example application called cmb_copy is included that performs the aforementioned offloaded copy when a CMB is available.

We have confirmed both cmb_copy and the new hello_world work as expected on both hardware from Eiditicom and Everspin. We plan to do more testing as more drives with WDS/RDS capable CMBs become available. We used PCIe packet counters in the Microsemi PCIe switch to confirm traffic is moving directly between the two NVMe SSDs and not being routed to the root complex on the CPU.

Feedback on the patches is gratefully received!

Cheers
 
Stephen

[1] https://github.com/Eideticom/spdk/tree/cmb-copy-v3


^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2018-02-09  0:29 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz follow: Atom feed
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2018-01-31 21:43 [SPDK] SPDK support for NVMe CMBs and PMRs with WDS/RDS Walker, Benjamin
  -- strict thread matches above, loose matches on Subject: below --
2018-02-09  0:29 Stephen Bates
2018-02-09  0:07 Stephen Bates
2018-02-08 23:46 Harris, James R
2018-02-08 23:36 Stephen Bates
2018-02-08  5:17 Stephen Bates
2018-02-08  5:07 Harris, James R
2018-02-08  3:05 Liu, Changpeng
2018-02-08  2:35 Stephen Bates
2018-02-07 23:18 Stephen Bates
2018-02-07 18:53 Stephen Bates
2018-02-07  0:20 Harris, James R
2018-02-06  4:05 Harris, James R
2018-02-06  3:06 Stephen Bates
2018-02-01 22:04 Stephen Bates
2018-01-31 20:14 Harris, James R
2018-01-31 20:08 Stephen Bates
2018-01-30  8:45 Stojaczyk, DariuszX
2018-01-30  3:35 Stephen Bates

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