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From: Ramalingam C <ramalingam.c@intel.com>
To: intel-gfx@lists.freedesktop.org, jani.nikula@linux.intel.com,
	daniel@ffwll.ch, chris@chris-wilson.co.uk,
	rodrigo.vivi@intel.com, ville.syrjala@linux.intel.com
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [PATCH v3 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op
Date: Tue, 17 Apr 2018 14:25:32 +0530	[thread overview]
Message-ID: <1523955333-8587-2-git-send-email-ramalingam.c@intel.com> (raw)
In-Reply-To: <1523955333-8587-1-git-send-email-ramalingam.c@intel.com>

From Gen9 onwards Bspec says HW supports Max Bytes per single RD/WR op is
511Bytes instead of previous 256Bytes used in SW.

This change allows the max bytes per op upto 511Bytes from Gen9 onwards.

v2:
  No Change.
v3:
  Inline function for max_xfer_size and renaming of the macro.[Jani]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h  |  1 +
 drivers/gpu/drm/i915/intel_i2c.c | 11 +++++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 475cac07d3e6..be6114a0e8ab 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3013,6 +3013,7 @@ enum i915_power_well_id {
 #define   GMBUS_CYCLE_STOP	(4<<25)
 #define   GMBUS_BYTE_COUNT_SHIFT 16
 #define   GMBUS_BYTE_COUNT_MAX   256U
+#define   GEN9_GMBUS_BYTE_COUNT_MAX 511U
 #define   GMBUS_SLAVE_INDEX_SHIFT 8
 #define   GMBUS_SLAVE_ADDR_SHIFT 1
 #define   GMBUS_SLAVE_READ	(1<<0)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index e6875509bcd9..4367827d7661 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -361,6 +361,13 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
+static inline
+unsigned int gmbus_max_xfer_size(struct drm_i915_private *dev_priv)
+{
+	return (INTEL_GEN(dev_priv) >= 9) ? GEN9_GMBUS_BYTE_COUNT_MAX :
+		GMBUS_BYTE_COUNT_MAX;
+}
+
 static int
 gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,
 		      unsigned short addr, u8 *buf, unsigned int len,
@@ -400,7 +407,7 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
 	int ret;
 
 	do {
-		len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
+		len = min(rx_size, gmbus_max_xfer_size(dev_priv));
 
 		ret = gmbus_xfer_read_chunk(dev_priv, msg->addr,
 					    buf, len, gmbus1_index);
@@ -462,7 +469,7 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
 	int ret;
 
 	do {
-		len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
+		len = min(tx_size, gmbus_max_xfer_size(dev_priv));
 
 		ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
 					     gmbus1_index);
-- 
2.7.4

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  reply	other threads:[~2018-04-17  9:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-17  8:55 [PATCH v3 0/2] GMBUS changes Ramalingam C
2018-04-17  8:55 ` Ramalingam C [this message]
2018-04-17 18:09   ` [PATCH v3 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op Ville Syrjälä
2018-04-18  5:21     ` Ramalingam C
2018-04-18  6:20       ` Jani Nikula
2018-04-18 15:17         ` Ville Syrjälä
2018-04-19  4:15           ` Ramalingam C
2018-04-17  8:55 ` [PATCH v3 2/2] drm/i915/gmbus: Enable burst read Ramalingam C
2018-04-17 18:42   ` Ville Syrjälä
2018-04-18 11:18     ` Ramalingam C
2018-04-17 11:30 ` ✗ Fi.CI.CHECKPATCH: warning for GMBUS changes (rev3) Patchwork
2018-04-17 12:50   ` Jani Nikula
2018-04-17 11:31 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-04-17 11:47 ` ✓ Fi.CI.BAT: success " Patchwork
2018-04-17 13:07 ` ✓ Fi.CI.IGT: " Patchwork

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