From: Mika Kahola <mika.kahola@intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: rodrigo.vivi@intel.com
Subject: Re: [PATCH 2/3] drm/i915/dp: Fix sink-crc reads.
Date: Tue, 24 Apr 2018 16:26:10 +0300 [thread overview]
Message-ID: <1524576370.11552.7.camel@intel.com> (raw)
In-Reply-To: <20180424025659.23659-2-dhinakaran.pandiyan@intel.com>
On Mon, 2018-04-23 at 19:56 -0700, Dhinakaran Pandiyan wrote:
> Sink crc is calculated by the sink for static frames irrespective of
> what the driver sets in TEST_SINK_START dpcd. Since PSR is the only
> use
> case for sink crc, we don't really need the sink_crc_{start, stop}
> code.
>
> The second problem with the current implementation is vblank waits.
> Enabling vblank interrupts triggers PSR exit, which means we aren't
> really reading the correct CRC values for PSR tests. vblank waits are
> replaced by delays.
>
> With the changes made in this patch, sink CRC is available only for
> static frames. I have tested this on a SKL laptop with PSR panel.
>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> drivers/gpu/drm/i915/intel_dp.c | 114 ++++--------------------
> ------------
> drivers/gpu/drm/i915/intel_drv.h | 3 +-
> 3 files changed, 15 insertions(+), 104 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 2f05f5262bba..35fa1418cc07 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2784,7 +2784,7 @@ static int i915_sink_crc(struct seq_file *m,
> void *data)
>
> intel_dp = enc_to_intel_dp(state->best_encoder);
>
> - ret = intel_dp_sink_crc(intel_dp, crtc_state, crc);
> + ret = intel_dp_sink_crc(intel_dp, crc);
> if (ret)
> goto err;
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 7dcc874b7d8f..7352ab631ea8 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3876,32 +3876,18 @@ intel_dp_configure_mst(struct intel_dp
> *intel_dp)
> intel_dp->is_mst);
> }
>
> -static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp,
> - struct intel_crtc_state
> *crtc_state, bool disable_wa)
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> {
> - struct intel_digital_port *dig_port =
> dp_to_dig_port(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(dig_port-
> >base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state-
> >base.crtc);
> - u8 buf;
> - int ret = 0;
> - int count = 0;
> - int attempts = 10;
> + int count = 0, ret = 0, attempts;
>
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) <
> 0) {
> - DRM_DEBUG_KMS("Sink CRC couldn't be stopped
> properly\n");
> - ret = -EIO;
> - goto out;
> - }
> + for (attempts = 0; attempts < 3 && count == 0; attempts++) {
A question. How did you end up with three attempts or one and a half
frames? We used to try 6 times or 6 vblanks until we gave up trying.
Well, I don't really know the history why we have ended up with 6
attempts in the first place.
> + u8 buf;
>
> - if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
> - buf & ~DP_TEST_SINK_START) < 0) {
> - DRM_DEBUG_KMS("Sink CRC couldn't be stopped
> properly\n");
> - ret = -EIO;
> - goto out;
> - }
> -
> - do {
> - intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
> + /* Wait for approximately half a frame, we cannot
> wait for a
> + * vblank interrupt as it triggers PSR exit.
> + */
> + if (attempts)
> + usleep_range(8000, 8500);
>
> if (drm_dp_dpcd_readb(&intel_dp->aux,
> DP_TEST_SINK_MISC, &buf) < 0)
> {
> @@ -3909,93 +3895,19 @@ static int intel_dp_sink_crc_stop(struct
> intel_dp *intel_dp,
> goto out;
> }
> count = buf & DP_TEST_COUNT_MASK;
> - } while (--attempts && count);
> -
> - if (attempts == 0) {
> - DRM_DEBUG_KMS("TIMEOUT: Sink CRC counter is not
> zeroed after calculation is stopped\n");
> - ret = -ETIMEDOUT;
> }
>
> - out:
> - if (disable_wa)
> - hsw_enable_ips(crtc_state);
> - return ret;
> -}
> -
> -static int intel_dp_sink_crc_start(struct intel_dp *intel_dp,
> - struct intel_crtc_state
> *crtc_state)
> -{
> - struct intel_digital_port *dig_port =
> dp_to_dig_port(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(dig_port-
> >base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state-
> >base.crtc);
> - u8 buf;
> - int ret;
> -
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC,
> &buf) < 0)
> - return -EIO;
> -
> - if (!(buf & DP_TEST_CRC_SUPPORTED))
> - return -ENOTTY;
> -
> - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) <
> 0)
> - return -EIO;
> -
> - if (buf & DP_TEST_SINK_START) {
> - ret = intel_dp_sink_crc_stop(intel_dp, crtc_state,
> false);
> - if (ret)
> - return ret;
> - }
> -
> - hsw_disable_ips(crtc_state);
> -
> - if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK,
> - buf | DP_TEST_SINK_START) < 0) {
> - hsw_enable_ips(crtc_state);
> - return -EIO;
> - }
> -
> - intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
> - return 0;
> -}
> -
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, struct
> intel_crtc_state *crtc_state, u8 *crc)
> -{
> - struct intel_digital_port *dig_port =
> dp_to_dig_port(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(dig_port-
> >base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state-
> >base.crtc);
> - u8 buf;
> - int count, ret;
> - int attempts = 6;
> -
> - ret = intel_dp_sink_crc_start(intel_dp, crtc_state);
> - if (ret)
> - return ret;
> -
> - do {
> - intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
> -
> - if (drm_dp_dpcd_readb(&intel_dp->aux,
> - DP_TEST_SINK_MISC, &buf) < 0)
> {
> - ret = -EIO;
> - goto stop;
> - }
> - count = buf & DP_TEST_COUNT_MASK;
> -
> - } while (--attempts && count == 0);
> -
> - if (attempts == 0) {
> - DRM_ERROR("Panel is unable to calculate any CRC
> after 6 vblanks\n");
> + if (attempts == 3) {
> ret = -ETIMEDOUT;
> - goto stop;
> + goto out;
> }
>
> if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc,
> 6) != 6) {
> ret = -EIO;
> - goto stop;
> + goto out;
> }
>
> -stop:
> - intel_dp_sink_crc_stop(intel_dp, crtc_state, true);
> +out:
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 44ed248f1fe9..cacee94749e2 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1644,8 +1644,7 @@ void intel_dp_sink_dpms(struct intel_dp
> *intel_dp, int mode);
> void intel_dp_encoder_reset(struct drm_encoder *encoder);
> void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> -int intel_dp_sink_crc(struct intel_dp *intel_dp,
> - struct intel_crtc_state *crtc_state, u8 *crc);
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
> bool intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state
> *conn_state);
--
Mika Kahola - Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-04-24 13:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-24 2:56 [PATCH 1/3] drm/i915/dp: Check if the sink crc we read is 6 bytes Dhinakaran Pandiyan
2018-04-24 2:56 ` [PATCH 2/3] drm/i915/dp: Fix sink-crc reads Dhinakaran Pandiyan
2018-04-24 13:26 ` Mika Kahola [this message]
2018-04-24 18:12 ` Dhinakaran Pandiyan
2018-04-24 20:55 ` Rodrigo Vivi
2018-04-24 21:54 ` Dhinakaran Pandiyan
2018-04-25 21:57 ` [PATCH v2 " Dhinakaran Pandiyan
2018-04-25 23:19 ` Rodrigo Vivi
2018-04-26 13:37 ` Ville Syrjälä
2018-04-24 2:56 ` [PATCH 3/3] drm/i915/psr: Move sink-crc to intel_psr.c Dhinakaran Pandiyan
2018-04-24 20:56 ` Rodrigo Vivi
2018-04-25 21:58 ` [PATCH v2 " Dhinakaran Pandiyan
2018-04-25 23:19 ` Rodrigo Vivi
2018-04-24 3:25 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/dp: Check if the sink crc we read is 6 bytes Patchwork
2018-04-24 7:21 ` Dhinakaran Pandiyan
2018-04-24 20:53 ` [PATCH 1/3] " Rodrigo Vivi
2018-04-25 22:32 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/dp: Check if the sink crc we read is 6 bytes. (rev3) Patchwork
2018-04-25 22:48 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-04-25 23:21 ` Rodrigo Vivi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1524576370.11552.7.camel@intel.com \
--to=mika.kahola@intel.com \
--cc=dhinakaran.pandiyan@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.