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* [PATCH] drm/psr: Fix missed entry in PSR setup time table.
@ 2018-05-11  0:54 Dhinakaran Pandiyan
  2018-05-11  1:35 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Dhinakaran Pandiyan @ 2018-05-11  0:54 UTC (permalink / raw)
  To: intel-gfx
  Cc: Dhinakaran Pandiyan, stable, Ville Syrjälä,
	Jose Roberto de Souza

Entry corresponding to 220 us setup time was missing. I am not aware of
any specific bug this fixes, but this could potentially result in enabling
PSR on a panel with a higher setup time requirement than supported by the
hardware.

I verified the value is present in eDP spec versions 1.3, 1.4 and 1.4a.

Fixes: 6608804b3d7f ("drm/dp: Add drm_dp_psr_setup_time()")
Cc: stable@vger.kernel.org
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 drivers/gpu/drm/drm_dp_helper.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 36c7609a4bd5..a7ba602a43a8 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1159,6 +1159,7 @@ int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
 	static const u16 psr_setup_time_us[] = {
 		PSR_SETUP_TIME(330),
 		PSR_SETUP_TIME(275),
+		PSR_SETUP_TIME(220),
 		PSR_SETUP_TIME(165),
 		PSR_SETUP_TIME(110),
 		PSR_SETUP_TIME(55),
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* ✓ Fi.CI.BAT: success for drm/psr: Fix missed entry in PSR setup time table.
  2018-05-11  0:54 [PATCH] drm/psr: Fix missed entry in PSR setup time table Dhinakaran Pandiyan
@ 2018-05-11  1:35 ` Patchwork
  2018-05-11  2:24 ` ✗ Fi.CI.IGT: failure " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-05-11  1:35 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

== Series Details ==

Series: drm/psr: Fix missed entry in PSR setup time table.
URL   : https://patchwork.freedesktop.org/series/43032/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4164 -> Patchwork_8978 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/43032/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_8978 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_suspend@basic-s4-devices:
      fi-kbl-7500u:       PASS -> DMESG-WARN (fdo#105128)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-cnl-psr:         DMESG-WARN (fdo#104951) -> PASS

    
  fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
  fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128


== Participating hosts (40 -> 36) ==

  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4164 -> Patchwork_8978

  CI_DRM_4164: a44969bdb6d69244a063eac7f76ea46353960409 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4475: 35f08c12aa216d5b62a5b9984b575cee6905098f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8978: a0ba0ff180cedd1e5edcf9dd424a64fb9ce0cf78 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4475: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit


== Linux commits ==

a0ba0ff180ce drm/psr: Fix missed entry in PSR setup time table.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8978/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* ✗ Fi.CI.IGT: failure for drm/psr: Fix missed entry in PSR setup time table.
  2018-05-11  0:54 [PATCH] drm/psr: Fix missed entry in PSR setup time table Dhinakaran Pandiyan
  2018-05-11  1:35 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-05-11  2:24 ` Patchwork
  2018-05-11 18:03 ` [PATCH] " Souza, Jose
  2018-05-18 17:45   ` [Intel-gfx] " Tarun Vyas
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-05-11  2:24 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx

== Series Details ==

Series: drm/psr: Fix missed entry in PSR setup time table.
URL   : https://patchwork.freedesktop.org/series/43032/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4164_full -> Patchwork_8978_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_8978_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_8978_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/43032/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_8978_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd1:
      shard-kbl:          PASS -> DMESG-WARN

    
    ==== Warnings ====

    igt@gem_exec_schedule@deep-bsd1:
      shard-kbl:          PASS -> SKIP +1

    igt@gem_pwrite@big-cpu-random:
      shard-apl:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_8978_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@wf_vblank-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_rotation_crc@sprite-rotation-180:
      shard-apl:          PASS -> DMESG-WARN (fdo#105127)

    igt@kms_vblank@pipe-b-accuracy-idle:
      shard-hsw:          PASS -> FAIL (fdo#102583)

    
    ==== Possible fixes ====

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-gtt:
      shard-hsw:          DMESG-FAIL (fdo#104724, fdo#103167) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
  fdo#105127 https://bugs.freedesktop.org/show_bug.cgi?id=105127


== Participating hosts (9 -> 9) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4164 -> Patchwork_8978

  CI_DRM_4164: a44969bdb6d69244a063eac7f76ea46353960409 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4475: 35f08c12aa216d5b62a5b9984b575cee6905098f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_8978: a0ba0ff180cedd1e5edcf9dd424a64fb9ce0cf78 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4475: 3ba0657bff4216d1ec7179935590261855f1651e @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8978/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/psr: Fix missed entry in PSR setup time table.
  2018-05-11  0:54 [PATCH] drm/psr: Fix missed entry in PSR setup time table Dhinakaran Pandiyan
  2018-05-11  1:35 ` ✓ Fi.CI.BAT: success for " Patchwork
  2018-05-11  2:24 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2018-05-11 18:03 ` Souza, Jose
  2018-05-11 19:46   ` Dhinakaran Pandiyan
  2018-05-18 17:45   ` [Intel-gfx] " Tarun Vyas
  3 siblings, 1 reply; 7+ messages in thread
From: Souza, Jose @ 2018-05-11 18:03 UTC (permalink / raw)
  To: intel-gfx@lists.freedesktop.org, Pandiyan, Dhinakaran
  Cc: ville.syrjala@linux.intel.com, stable@vger.kernel.org

On Thu, 2018-05-10 at 17:54 -0700, Dhinakaran Pandiyan wrote:
> Entry corresponding to 220 us setup time was missing. I am not aware
> of
> any specific bug this fixes, but this could potentially result in
> enabling
> PSR on a panel with a higher setup time requirement than supported by
> the
> hardware.

It should be 'a lower setup time'.
Sink sets 2h requesting 220us but source will only wait 165us.

Other than that looks good:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> I verified the value is present in eDP spec versions 1.3, 1.4 and
> 1.4a.
> 
> Fixes: 6608804b3d7f ("drm/dp: Add drm_dp_psr_setup_time()")
> Cc: stable@vger.kernel.org
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jose Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/drm_dp_helper.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/drm_dp_helper.c
> b/drivers/gpu/drm/drm_dp_helper.c
> index 36c7609a4bd5..a7ba602a43a8 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1159,6 +1159,7 @@ int drm_dp_psr_setup_time(const u8
> psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
>  	static const u16 psr_setup_time_us[] = {
>  		PSR_SETUP_TIME(330),
>  		PSR_SETUP_TIME(275),
> +		PSR_SETUP_TIME(220),
>  		PSR_SETUP_TIME(165),
>  		PSR_SETUP_TIME(110),
>  		PSR_SETUP_TIME(55),

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/psr: Fix missed entry in PSR setup time table.
  2018-05-11 18:03 ` [PATCH] " Souza, Jose
@ 2018-05-11 19:46   ` Dhinakaran Pandiyan
  0 siblings, 0 replies; 7+ messages in thread
From: Dhinakaran Pandiyan @ 2018-05-11 19:46 UTC (permalink / raw)
  To: Souza, Jose, intel-gfx@lists.freedesktop.org
  Cc: ville.syrjala@linux.intel.com, stable@vger.kernel.org,
	DRI Development

On Fri, 2018-05-11 at 18:03 +0000, Souza, Jose wrote:
> On Thu, 2018-05-10 at 17:54 -0700, Dhinakaran Pandiyan wrote:
> > 
> > Entry corresponding to 220 us setup time was missing. I am not
> > aware
> > of
> > any specific bug this fixes, but this could potentially result in
> > enabling
> > PSR on a panel with a higher setup time requirement than supported
> > by
> > the
> > hardware.
> It should be 'a lower setup time'.
> Sink sets 2h requesting 220us but source will only wait 165us.

By hardware, I meant source :) We'll end up enabling PSR on a sink with
a higher setup time requirement (220us) than supported by the source
hardware (let's say 200 us) because we read the sink requirement as 165
us.


> 
> Other than that looks good:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
Thanks!

I'll resend this along the other PSR patch you reviewed.

> > 
> > 
> > I verified the value is present in eDP spec versions 1.3, 1.4 and
> > 1.4a.
> > 
> > Fixes: 6608804b3d7f ("drm/dp: Add drm_dp_psr_setup_time()")
> > Cc: stable@vger.kernel.org
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Jose Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> >  drivers/gpu/drm/drm_dp_helper.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 36c7609a4bd5..a7ba602a43a8 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -1159,6 +1159,7 @@ int drm_dp_psr_setup_time(const u8
> > psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
> >  	static const u16 psr_setup_time_us[] = {
> >  		PSR_SETUP_TIME(330),
> >  		PSR_SETUP_TIME(275),
> > +		PSR_SETUP_TIME(220),
> >  		PSR_SETUP_TIME(165),
> >  		PSR_SETUP_TIME(110),
> >  		PSR_SETUP_TIME(55),

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/psr: Fix missed entry in PSR setup time table.
  2018-05-11  0:54 [PATCH] drm/psr: Fix missed entry in PSR setup time table Dhinakaran Pandiyan
@ 2018-05-18 17:45   ` Tarun Vyas
  2018-05-11  2:24 ` ✗ Fi.CI.IGT: failure " Patchwork
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 7+ messages in thread
From: Tarun Vyas @ 2018-05-18 17:45 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx, stable

On Thu, May 10, 2018 at 05:54:19PM -0700, Dhinakaran Pandiyan wrote:
> Entry corresponding to 220 us setup time was missing. I am not aware of
> any specific bug this fixes, but this could potentially result in enabling
> PSR on a panel with a higher setup time requirement than supported by the
> hardware.
> 
> I verified the value is present in eDP spec versions 1.3, 1.4 and 1.4a.
> 
> Fixes: 6608804b3d7f ("drm/dp: Add drm_dp_psr_setup_time()")
> Cc: stable@vger.kernel.org
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jose Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/drm_dp_helper.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 36c7609a4bd5..a7ba602a43a8 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1159,6 +1159,7 @@ int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
>  	static const u16 psr_setup_time_us[] = {
>  		PSR_SETUP_TIME(330),
>  		PSR_SETUP_TIME(275),
> +		PSR_SETUP_TIME(220),
Verified the PSR set up time table in the eDP 1.4b spec
Reviewed-by: Tarun Vyas <tarun.vyas@intel.com>
>  		PSR_SETUP_TIME(165),
>  		PSR_SETUP_TIME(110),
>  		PSR_SETUP_TIME(55),
> -- 
> 2.14.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/psr: Fix missed entry in PSR setup time table.
@ 2018-05-18 17:45   ` Tarun Vyas
  0 siblings, 0 replies; 7+ messages in thread
From: Tarun Vyas @ 2018-05-18 17:45 UTC (permalink / raw)
  To: Dhinakaran Pandiyan; +Cc: intel-gfx, stable

On Thu, May 10, 2018 at 05:54:19PM -0700, Dhinakaran Pandiyan wrote:
> Entry corresponding to 220 us setup time was missing. I am not aware of
> any specific bug this fixes, but this could potentially result in enabling
> PSR on a panel with a higher setup time requirement than supported by the
> hardware.
> 
> I verified the value is present in eDP spec versions 1.3, 1.4 and 1.4a.
> 
> Fixes: 6608804b3d7f ("drm/dp: Add drm_dp_psr_setup_time()")
> Cc: stable@vger.kernel.org
> Cc: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> Cc: Jose Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/drm_dp_helper.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 36c7609a4bd5..a7ba602a43a8 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -1159,6 +1159,7 @@ int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE])
>  	static const u16 psr_setup_time_us[] = {
>  		PSR_SETUP_TIME(330),
>  		PSR_SETUP_TIME(275),
> +		PSR_SETUP_TIME(220),
Verified the PSR set up time table in the eDP 1.4b spec
Reviewed-by: Tarun Vyas <tarun.vyas@intel.com>
>  		PSR_SETUP_TIME(165),
>  		PSR_SETUP_TIME(110),
>  		PSR_SETUP_TIME(55),
> -- 
> 2.14.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2018-05-18 17:46 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-05-11  0:54 [PATCH] drm/psr: Fix missed entry in PSR setup time table Dhinakaran Pandiyan
2018-05-11  1:35 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-05-11  2:24 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-05-11 18:03 ` [PATCH] " Souza, Jose
2018-05-11 19:46   ` Dhinakaran Pandiyan
2018-05-18 17:45 ` Tarun Vyas
2018-05-18 17:45   ` [Intel-gfx] " Tarun Vyas

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