* [U-Boot] [PATCH] ARM: socfpga: Make DRAM node available in SPL
@ 2018-05-29 16:38 Marek Vasut
2018-05-31 9:53 ` See, Chin Liang
0 siblings, 1 reply; 2+ messages in thread
From: Marek Vasut @ 2018-05-29 16:38 UTC (permalink / raw)
To: u-boot
The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
---
arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi
index d7616dd1c5..3f59f02577 100644
--- a/arch/arm/dts/socfpga_arria10_socdk.dtsi
+++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi
@@ -34,6 +34,7 @@
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
+ u-boot,dm-pre-reloc;
};
a10leds {
--
2.17.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* [U-Boot] [PATCH] ARM: socfpga: Make DRAM node available in SPL
2018-05-29 16:38 [U-Boot] [PATCH] ARM: socfpga: Make DRAM node available in SPL Marek Vasut
@ 2018-05-31 9:53 ` See, Chin Liang
0 siblings, 0 replies; 2+ messages in thread
From: See, Chin Liang @ 2018-05-31 9:53 UTC (permalink / raw)
To: u-boot
On Tue, 2018-05-29 at 18:38 +0200, Marek Vasut wrote:
> The SPL can also parse the DRAM configuration node to figure out the
> memory layout, make sure it is available.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> ---
> arch/arm/dts/socfpga_arria10_socdk.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi
> b/arch/arm/dts/socfpga_arria10_socdk.dtsi
> index d7616dd1c5..3f59f02577 100644
> --- a/arch/arm/dts/socfpga_arria10_socdk.dtsi
> +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi
> @@ -34,6 +34,7 @@
> name = "memory";
> device_type = "memory";
> reg = <0x0 0x40000000>; /* 1GB */
> + u-boot,dm-pre-reloc;
> };
>
> a10leds {
Reviewed-by: Chin Liang See <chin.liang.see@intel.com>
Thanks
Chin Liang
^ permalink raw reply [flat|nested] 2+ messages in thread
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2018-05-29 16:38 [U-Boot] [PATCH] ARM: socfpga: Make DRAM node available in SPL Marek Vasut
2018-05-31 9:53 ` See, Chin Liang
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