* [PATCH] drm/i915: Fix gen-2 check for 128B tiling
@ 2018-07-21 9:06 Dhinakaran Pandiyan
2018-07-21 9:11 ` Chris Wilson
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Dhinakaran Pandiyan @ 2018-07-21 9:06 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan
intel_tile_width_bytes() returns 128B for gen-2 y-tiled buffers while at
the same time HAS_128_BYTE_Y_TILING() returns false for gen-2. I am
assuming intel_tile_width_bytes() does the right thing.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0f49f9988dfa..9b8a4f57a28c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2556,9 +2556,8 @@ intel_info(const struct drm_i915_private *dev_priv)
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
* rows, which changed the alignment requirements and fence programming.
*/
-#define HAS_128_BYTE_Y_TILING(dev_priv) (!IS_GEN2(dev_priv) && \
- !(IS_I915G(dev_priv) || \
- IS_I915GM(dev_priv)))
+#define HAS_128_BYTE_Y_TILING(dev_priv) (!(IS_I915G(dev_priv) || \
+ IS_I915GM(dev_priv)))
#define SUPPORTS_TV(dev_priv) ((dev_priv)->info.supports_tv)
#define I915_HAS_HOTPLUG(dev_priv) ((dev_priv)->info.has_hotplug)
--
2.17.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
@ 2018-07-21 9:11 ` Chris Wilson
2018-07-21 23:52 ` Dhinakaran Pandiyan
2018-07-21 9:22 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (3 subsequent siblings)
4 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2018-07-21 9:11 UTC (permalink / raw)
To: Dhinakaran Pandiyan, intel-gfx; +Cc: Dhinakaran Pandiyan
Quoting Dhinakaran Pandiyan (2018-07-21 10:06:07)
> intel_tile_width_bytes() returns 128B for gen-2 y-tiled buffers while at
> the same time HAS_128_BYTE_Y_TILING() returns false for gen-2. I am
> assuming intel_tile_width_bytes() does the right thing.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
It's rather that gen2 only has 128B tiling. Note that it only makes any
difference for intel_tile_width_bytes()..
-Chris
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
2018-07-21 9:11 ` Chris Wilson
@ 2018-07-21 9:22 ` Patchwork
2018-07-21 9:23 ` ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-21 9:22 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix gen-2 check for 128B tiling
URL : https://patchwork.freedesktop.org/series/47003/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4b57e640b38e drm/i915: Fix gen-2 check for 128B tiling
-:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#28: FILE: drivers/gpu/drm/i915/i915_drv.h:2559:
+#define HAS_128_BYTE_Y_TILING(dev_priv) (!(IS_I915G(dev_priv) || \
+ IS_I915GM(dev_priv)))
total: 0 errors, 0 warnings, 1 checks, 11 lines checked
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
2018-07-21 9:11 ` Chris Wilson
2018-07-21 9:22 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2018-07-21 9:23 ` Patchwork
2018-07-21 9:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-21 19:52 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-21 9:23 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix gen-2 check for 128B tiling
URL : https://patchwork.freedesktop.org/series/47003/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Fix gen-2 check for 128B tiling
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3645:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3644:16: warning: expression using sizeof(void)
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
` (2 preceding siblings ...)
2018-07-21 9:23 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2018-07-21 9:44 ` Patchwork
2018-07-21 19:52 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-21 9:44 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix gen-2 check for 128B tiling
URL : https://patchwork.freedesktop.org/series/47003/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4522 -> Patchwork_9742 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/47003/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9742 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_module_reload@basic-reload:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106725, fdo#106248)
igt@drv_selftest@live_workarounds:
{fi-cfl-8109u}: PASS -> DMESG-FAIL (fdo#107292)
==== Possible fixes ====
igt@drv_selftest@live_hangcheck:
fi-kbl-7560u: DMESG-FAIL (fdo#106560, fdo#106947) -> PASS
fi-skl-guc: DMESG-FAIL (fdo#107174) -> PASS
igt@drv_selftest@live_workarounds:
fi-skl-6700k2: DMESG-FAIL (fdo#107292) -> PASS
igt@kms_flip@basic-flip-vs-dpms:
fi-kbl-r: DMESG-WARN (fdo#105602) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-skl-guc: FAIL (fdo#103191) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
fdo#106947 https://bugs.freedesktop.org/show_bug.cgi?id=106947
fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
== Participating hosts (47 -> 41) ==
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-kbl-8809g
== Build changes ==
* Linux: CI_DRM_4522 -> Patchwork_9742
CI_DRM_4522: 20532651221ed29af16e2db0a7ec8b9bd482c994 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4571: 65fccc149b85968cdce4737266b056059c1510f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9742: 4b57e640b38ee3918057e37686cb6b94bd96c2d5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4b57e640b38e drm/i915: Fix gen-2 check for 128B tiling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9742/issues.html
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
` (3 preceding siblings ...)
2018-07-21 9:44 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-07-21 19:52 ` Patchwork
4 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-21 19:52 UTC (permalink / raw)
To: Dhinakaran Pandiyan; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix gen-2 check for 128B tiling
URL : https://patchwork.freedesktop.org/series/47003/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4522_full -> Patchwork_9742_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9742_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9742_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9742_full:
=== IGT changes ===
==== Warnings ====
igt@gem_exec_schedule@deep-bsd1:
shard-kbl: PASS -> SKIP +2
igt@gem_mocs_settings@mocs-rc6-vebox:
shard-kbl: SKIP -> PASS +2
== Known issues ==
Here are the changes found in Patchwork_9742_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_flip@2x-flip-vs-expired-vblank:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_flip@plain-flip-ts-check:
shard-glk: PASS -> FAIL (fdo#100368) +1
igt@kms_setmode@basic:
shard-hsw: PASS -> FAIL (fdo#99912)
==== Possible fixes ====
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-hsw: DMESG-WARN (fdo#102614) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4522 -> Patchwork_9742
CI_DRM_4522: 20532651221ed29af16e2db0a7ec8b9bd482c994 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4571: 65fccc149b85968cdce4737266b056059c1510f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9742: 4b57e640b38ee3918057e37686cb6b94bd96c2d5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9742/shards.html
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915: Fix gen-2 check for 128B tiling
2018-07-21 9:11 ` Chris Wilson
@ 2018-07-21 23:52 ` Dhinakaran Pandiyan
0 siblings, 0 replies; 7+ messages in thread
From: Dhinakaran Pandiyan @ 2018-07-21 23:52 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On Sat, 2018-07-21 at 10:11 +0100, Chris Wilson wrote:
> Quoting Dhinakaran Pandiyan (2018-07-21 10:06:07)
> >
> > intel_tile_width_bytes() returns 128B for gen-2 y-tiled buffers
> > while at
> > the same time HAS_128_BYTE_Y_TILING() returns false for gen-2. I am
> > assuming intel_tile_width_bytes() does the right thing.
> >
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> It's rather that gen2 only has 128B tiling. Note that it only makes
> any
> difference for intel_tile_width_bytes()..
Okay, the macro is a bit misleading. Do you have any suggestions to
clarify it or would you prefer I leave it as it is?
> -Chris
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-07-21 23:27 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-07-21 9:06 [PATCH] drm/i915: Fix gen-2 check for 128B tiling Dhinakaran Pandiyan
2018-07-21 9:11 ` Chris Wilson
2018-07-21 23:52 ` Dhinakaran Pandiyan
2018-07-21 9:22 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-07-21 9:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-07-21 9:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-21 19:52 ` ✓ Fi.CI.IGT: " Patchwork
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