From: Trent Piepho <tpiepho@impinj.com>
To: "l.stach@pengutronix.de" <l.stach@pengutronix.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Cc: "fabio.estevam@nxp.com" <fabio.estevam@nxp.com>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"hongxing.zhu@nxp.com" <hongxing.zhu@nxp.com>,
"kernel@pengutronix.de" <kernel@pengutronix.de>
Subject: Re: [PATCH 1/2] ARM: dts: imx7d: Add node for PCIe PHY
Date: Wed, 1 Aug 2018 17:33:32 +0000 [thread overview]
Message-ID: <1533144812.2283.227.camel@impinj.com> (raw)
In-Reply-To: <1533119951.20186.5.camel@pengutronix.de>
On Wed, 2018-08-01 at 12:39 +0200, Lucas Stach wrote:
>
> > +This is the PHY associated with the IMX7d PCIe controller. It's
> > used by the
> > +PCI-e controller via the fsl,pcie-phy phandle.
> > +
> > +Required properties:
> > +- compatible:
> > + - "fsl,imx-pcie-phy"
>
> This is too generic. Please change it to "fsl,imx7-pcie-phy".
Can anyone from NXP tell us if an external PCIe PHY block is present in
other IMX designs? I suspect that this is generic, but no design other
than imx7d has had any reason to use this PHY register space yet.
If this is specific to this SoC, then maybe it shoudl be fsl,imx7d-
pcie-phy, since the iMX7s has no pcie.
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WARNING: multiple messages have this Message-ID (diff)
From: tpiepho@impinj.com (Trent Piepho)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] ARM: dts: imx7d: Add node for PCIe PHY
Date: Wed, 1 Aug 2018 17:33:32 +0000 [thread overview]
Message-ID: <1533144812.2283.227.camel@impinj.com> (raw)
In-Reply-To: <1533119951.20186.5.camel@pengutronix.de>
On Wed, 2018-08-01 at 12:39 +0200, Lucas Stach wrote:
>
> > +This is the PHY associated with the IMX7d PCIe controller. It's
> > used by the
> > +PCI-e controller via the fsl,pcie-phy phandle.
> > +
> > +Required properties:
> > +- compatible:
> > + - "fsl,imx-pcie-phy"
>
> This is too generic. Please change it to "fsl,imx7-pcie-phy".
Can anyone from NXP tell us if an external PCIe PHY block is present in
other IMX designs? I suspect that this is generic, but no design other
than imx7d has had any reason to use this PHY register space yet.
If this is specific to this SoC, then maybe it shoudl be fsl,imx7d-
pcie-phy, since the iMX7s has no pcie.
next prev parent reply other threads:[~2018-08-01 17:33 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-18 19:44 [PATCH 0/2] Workaround for IMX7d PCI-e PLL lock failure Trent Piepho
2018-07-18 19:44 ` Trent Piepho
2018-07-18 19:44 ` [PATCH 1/2] ARM: dts: imx7d: Add node for PCIe PHY Trent Piepho
2018-07-18 19:44 ` Trent Piepho
2018-07-19 3:24 ` Shawn Guo
2018-07-19 3:24 ` Shawn Guo
2018-08-01 10:39 ` Lucas Stach
2018-08-01 10:39 ` Lucas Stach
2018-08-01 17:33 ` Trent Piepho [this message]
2018-08-01 17:33 ` Trent Piepho
2018-08-02 0:43 ` Richard Zhu
2018-08-02 0:43 ` Richard Zhu
2018-08-02 6:55 ` Lucas Stach
2018-08-02 6:55 ` Lucas Stach
2018-07-18 19:44 ` [PATCH 2/2] PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure Trent Piepho
2018-07-18 19:44 ` Trent Piepho
2018-08-01 10:44 ` Lucas Stach
2018-08-01 10:44 ` Lucas Stach
2018-08-01 10:47 ` [PATCH 0/2] Workaround for IMX7d PCI-e PLL lock failure Lucas Stach
2018-08-01 10:47 ` Lucas Stach
2018-09-17 10:13 ` Lorenzo Pieralisi
2018-09-17 10:13 ` Lorenzo Pieralisi
2018-09-17 10:13 ` Lorenzo Pieralisi
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