Re: [PATCH 4.4 41/43] x86/mm/pat: Make set_memory_np() L1TF safe

[Ben Hutchings <ben.hutchings@codethink.co.uk>]

On Tue, 2018-08-14 at 19:18 +0200, Greg Kroah-Hartman wrote:
> 4.4-stable review patch.  If anyone has any objections, please let me know.
> 
> ------------------
> 
> From: Andi Kleen <ak@linux.intel.com>
> 
> commit 958f79b9ee55dfaf00c8106ed1c22a2919e0028b upstream
[...]
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -378,12 +378,39 @@ static inline pmd_t pfn_pmd(unsigned lon
> >  	return __pmd(pfn | massage_pgprot(pgprot));
>  }
>  
> +static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
> +{
> +	phys_addr_t pfn = page_nr << PAGE_SHIFT;
> +	pfn ^= protnone_mask(pgprot_val(pgprot));
> +	pfn &= PHYSICAL_PUD_PAGE_MASK;
> +	return __pud(pfn | massage_pgprot(pgprot));
> +}
[...]

This (and the backport to 4.9) are missing the fix from commit
e14d7dfb41f5 "x86/speculation/l1tf: Fix up pte->pfn conversion for
PAE", as that was applied earlier in the series.  But since PAE implies
only 3-level paging I don't know how the PUD functions get used or
whether this actually matters.

Ben.

-- 
Ben Hutchings, Software Developer                         Codethink Ltd
https://www.codethink.co.uk/                 Dale House, 35 Dale Street
                                     Manchester, M1 2HF, United Kingdom