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From: Kristen C Accardi <kristen@linux.intel.com>
To: Jann Horn <jannh@google.com>
Cc: Kernel Hardening <kernel-hardening@lists.openwall.com>
Subject: Re: [RFC PATCH] x86: entry: flush the cache if syscall error
Date: Wed, 12 Sep 2018 10:34:46 -0700	[thread overview]
Message-ID: <1536773686.3240.9.camel@linux.intel.com> (raw)
In-Reply-To: <CAG48ez1=_mtYTXvE=eeA6FkEjeZQsnqRJAtzZ75nyeoZuEtmnQ@mail.gmail.com>

On Tue, 2018-09-11 at 20:02 +0200, Jann Horn wrote:
> On Mon, Sep 10, 2018 at 9:14 PM Kristen Carlson Accardi
> <kristen@linux.intel.com> wrote:
> > This patch aims to make it harder to perform cache timing attacks
> > on data
> > left behind by system calls. If we have an error returned from a
> > syscall,
> > flush the L1 cache.
> 
> How much protection does this provide, given that it e.g. doesn't
> flush L2/L3 and doesn't prevent data leakage through hyperthreading
> and cache coherency? Is an L2/L3-based attack expected to be harder
> than an L1D-based one?

My reasoning here is that L2/L3 caches can be partitioned using
something like CAT (maybe), but L1 cannot. So IMO L1 is the case that
needs coverage. Also, while this doesn't address a specific exploit,
the idea is that attacks on data in L1D are more common, and the
performance penalty for L2/L3 flushes would be too high without a
specific exploit in mind.
 

      reply	other threads:[~2018-09-12 17:34 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-10 19:10 [RFC PATCH] x86: entry: flush the cache if syscall error Kristen Carlson Accardi
2018-09-10 20:32 ` Jann Horn
2018-09-11 15:58   ` Kristen C Accardi
2018-09-11 16:12     ` Jann Horn
2018-09-11  8:41 ` Greg KH
2018-09-11 16:01   ` Kristen C Accardi
2018-09-11 16:06 ` Eric Biggers
2018-09-12 17:29   ` Kristen C Accardi
2018-09-12 17:45     ` Eric Biggers
2018-09-12 18:19       ` Rik van Riel
2018-09-11 18:02 ` Jann Horn
2018-09-12 17:34   ` Kristen C Accardi [this message]

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