From: thor.thayer@linux.intel.com
To: dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
bp@alien8.de, mchehab@kernel.org
Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org,
linux-edac@vger.kernel.org
Subject: [1/6] arm64: dts: stratix10: Additions to EDAC System Manager
Date: Wed, 19 Sep 2018 14:38:56 -0500 [thread overview]
Message-ID: <1537385941-11582-2-git-send-email-thor.thayer@linux.intel.com> (raw)
From: Thor Thayer <thor.thayer@linux.intel.com>
Add the phandle, address, size and ranges to the
Stratix10 System Manager node to match the existing
Arria10 EDAC implementation.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d033da401c26..78b4b06e8935 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -469,9 +469,13 @@
eccmgr {
compatible = "altr,socfpga-s10-ecc-manager";
+ altr,sysmgr-syscon = <&sysmgr>;
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupts = <0 15 4>, <0 95 4>;
interrupt-controller;
#interrupt-cells = <2>;
+ ranges;
sdramedac {
compatible = "altr,sdram-edac-s10";
WARNING: multiple messages have this Message-ID (diff)
From: thor.thayer@linux.intel.com
To: dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
bp@alien8.de, mchehab@kernel.org
Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org,
linux-edac@vger.kernel.org
Subject: [PATCH 1/6] arm64: dts: stratix10: Additions to EDAC System Manager
Date: Wed, 19 Sep 2018 14:38:56 -0500 [thread overview]
Message-ID: <1537385941-11582-2-git-send-email-thor.thayer@linux.intel.com> (raw)
In-Reply-To: <1537385941-11582-1-git-send-email-thor.thayer@linux.intel.com>
From: Thor Thayer <thor.thayer@linux.intel.com>
Add the phandle, address, size and ranges to the
Stratix10 System Manager node to match the existing
Arria10 EDAC implementation.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d033da401c26..78b4b06e8935 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -469,9 +469,13 @@
eccmgr {
compatible = "altr,socfpga-s10-ecc-manager";
+ altr,sysmgr-syscon = <&sysmgr>;
+ #address-cells = <1>;
+ #size-cells = <1>;
interrupts = <0 15 4>, <0 95 4>;
interrupt-controller;
#interrupt-cells = <2>;
+ ranges;
sdramedac {
compatible = "altr,sdram-edac-s10";
--
2.7.4
next reply other threads:[~2018-09-19 19:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-19 19:38 thor.thayer [this message]
2018-09-19 19:38 ` [PATCH 1/6] arm64: dts: stratix10: Additions to EDAC System Manager thor.thayer
-- strict thread matches above, loose matches on Subject: below --
2018-09-24 22:27 [3/6] arm64: dts: stratix10: Add SDRAM node Dinh Nguyen
2018-09-24 22:27 ` [PATCH 3/6] " Dinh Nguyen
2018-09-24 20:42 [3/6] " thor.thayer
2018-09-24 20:42 ` [PATCH 3/6] " Thor Thayer
2018-09-24 15:41 [6/6] arm64: dts: stratix10: Add peripheral EDAC nodes Dinh Nguyen
2018-09-24 15:41 ` [PATCH 6/6] " Dinh Nguyen
2018-09-24 15:40 [3/6] arm64: dts: stratix10: Add SDRAM node Dinh Nguyen
2018-09-24 15:40 ` [PATCH 3/6] " Dinh Nguyen
2018-09-24 15:37 [1/6] arm64: dts: stratix10: Additions to EDAC System Manager Dinh Nguyen
2018-09-24 15:37 ` [PATCH 1/6] " Dinh Nguyen
2018-09-19 19:39 [6/6] arm64: dts: stratix10: Add peripheral EDAC nodes thor.thayer
2018-09-19 19:39 ` [PATCH 6/6] " thor.thayer
2018-09-19 19:39 [5/6] EDAC, altera: Add Stratix10 peripheral support thor.thayer
2018-09-19 19:39 ` [PATCH 5/6] " thor.thayer
2018-09-19 19:38 [4/6] EDAC, altera: Merge Stratix10 into Arria10 SDRAM probe thor.thayer
2018-09-19 19:38 ` [PATCH 4/6] " thor.thayer
2018-09-19 19:38 [3/6] arm64: dts: stratix10: Add SDRAM node thor.thayer
2018-09-19 19:38 ` [PATCH 3/6] " thor.thayer
2018-09-19 19:38 [2/6] EDAC, altera: Combine Stratix10 and Arria10 probe functions thor.thayer
2018-09-19 19:38 ` [PATCH 2/6] " thor.thayer
2018-09-19 19:38 [PATCH 0/6] Add Peripheral EDACs to SOCFPGA Stratix10 thor.thayer
2018-09-24 10:40 ` Borislav Petkov
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