From: CK Hu <ck.hu@mediatek.com>
To: yongqiang.niu@mediatek.com
Cc: p.zabel@pengutronix.de, robh+dt@kernel.org,
matthias.bgg@gmail.com, airlied@linux.ie, mark.rutland@arm.com,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, Bibby.Hsieh@mediatek.com,
yt.shen@mediatek.com
Subject: Re: [PATCH v2 04/25] drm/mediatek: add mutex sof into ddp private data
Date: Thu, 28 Mar 2019 11:02:00 +0800 [thread overview]
Message-ID: <1553742120.14682.3.camel@mtksdaap41> (raw)
In-Reply-To: <1553667561-25447-5-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> mutex0 SOF register offset not always 0x30.
> for mt8183, that offset will be 0x2C,
> add this regsiter offset into private data
I think you do two things in this patch. One is mutex0 SOF register
offset, and another is making sof value variable. So please split this
into two patches.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 51 ++++++++++++++++++++++++++++------
> 1 file changed, 42 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 7f0d46e..495ebc5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -42,12 +42,13 @@
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> #define MT2701_DISP_MUTEX0_MOD0 0x2C
> +#define MT2701_DISP_MUTEX0_SOF0 0x30
>
> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> #define DISP_REG_MUTEX_MOD(data, n) ((data)->mutex_mod_reg + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(data, n) ((data)->mutex_sof_reg + 0x20 * (n))
Even though previous patch's indent is not aligned, I would like you to
align this indent.
Regards,
CK
> #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
>
> #define INT_MUTEX BIT(1)
> @@ -149,9 +150,22 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +enum mtk_ddp_mutex_sof_id {
> + DDP_MUTEX_SOF_SINGLE_MODE,
> + DDP_MUTEX_SOF_DSI0,
> + DDP_MUTEX_SOF_DSI1,
> + DDP_MUTEX_SOF_DPI0,
> + DDP_MUTEX_SOF_DPI1,
> + DDP_MUTEX_SOF_DSI2,
> + DDP_MUTEX_SOF_DSI3,
> + DDP_MUTEX_SOF_MAX,
> +};
> +
> struct mtk_ddp_data {
> const unsigned int *mutex_mod;
> + const unsigned int *mutex_sof;
> unsigned int mutex_mod_reg;
> + unsigned int mutex_sof_reg;
> };
>
> struct mtk_ddp {
> @@ -209,19 +223,35 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
> static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> .mutex_mod = mt2712_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> .mutex_mod = mt8173_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> @@ -462,28 +492,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> unsigned int reg;
> + unsigned int sof_id;
> unsigned int offset;
>
> WARN_ON(&ddp->mutex[mutex->id] != mutex);
>
> switch (id) {
> case DDP_COMPONENT_DSI0:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI1:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI2:
> - reg = MUTEX_SOF_DSI2;
> + sof_id = DDP_MUTEX_SOF_DSI2;
> break;
> case DDP_COMPONENT_DSI3:
> - reg = MUTEX_SOF_DSI3;
> + sof_id = DDP_MUTEX_SOF_DSI3;
> break;
> case DDP_COMPONENT_DPI0:
> - reg = MUTEX_SOF_DPI0;
> + sof_id = DDP_MUTEX_SOF_DPI0;
> break;
> case DDP_COMPONENT_DPI1:
> - reg = MUTEX_SOF_DPI1;
> + sof_id = DDP_MUTEX_SOF_DPI1;
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
> @@ -500,7 +531,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> return;
> }
>
> - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + writel_relaxed(ddp->data->mutex_sof[sof_id],
> + ddp->regs + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> }
>
> void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -521,7 +553,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> case DDP_COMPONENT_DPI0:
> case DDP_COMPONENT_DPI1:
> writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + ddp->regs +
> + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
WARNING: multiple messages have this Message-ID (diff)
From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
Bibby.Hsieh@mediatek.com, airlied@linux.ie,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
yt.shen@mediatek.com, robh+dt@kernel.org,
linux-mediatek@lists.infradead.org, p.zabel@pengutronix.de,
matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 04/25] drm/mediatek: add mutex sof into ddp private data
Date: Thu, 28 Mar 2019 11:02:00 +0800 [thread overview]
Message-ID: <1553742120.14682.3.camel@mtksdaap41> (raw)
In-Reply-To: <1553667561-25447-5-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> mutex0 SOF register offset not always 0x30.
> for mt8183, that offset will be 0x2C,
> add this regsiter offset into private data
I think you do two things in this patch. One is mutex0 SOF register
offset, and another is making sof value variable. So please split this
into two patches.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 51 ++++++++++++++++++++++++++++------
> 1 file changed, 42 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 7f0d46e..495ebc5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -42,12 +42,13 @@
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> #define MT2701_DISP_MUTEX0_MOD0 0x2C
> +#define MT2701_DISP_MUTEX0_SOF0 0x30
>
> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> #define DISP_REG_MUTEX_MOD(data, n) ((data)->mutex_mod_reg + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(data, n) ((data)->mutex_sof_reg + 0x20 * (n))
Even though previous patch's indent is not aligned, I would like you to
align this indent.
Regards,
CK
> #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
>
> #define INT_MUTEX BIT(1)
> @@ -149,9 +150,22 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +enum mtk_ddp_mutex_sof_id {
> + DDP_MUTEX_SOF_SINGLE_MODE,
> + DDP_MUTEX_SOF_DSI0,
> + DDP_MUTEX_SOF_DSI1,
> + DDP_MUTEX_SOF_DPI0,
> + DDP_MUTEX_SOF_DPI1,
> + DDP_MUTEX_SOF_DSI2,
> + DDP_MUTEX_SOF_DSI3,
> + DDP_MUTEX_SOF_MAX,
> +};
> +
> struct mtk_ddp_data {
> const unsigned int *mutex_mod;
> + const unsigned int *mutex_sof;
> unsigned int mutex_mod_reg;
> + unsigned int mutex_sof_reg;
> };
>
> struct mtk_ddp {
> @@ -209,19 +223,35 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
> static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> .mutex_mod = mt2712_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> .mutex_mod = mt8173_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> @@ -462,28 +492,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> unsigned int reg;
> + unsigned int sof_id;
> unsigned int offset;
>
> WARN_ON(&ddp->mutex[mutex->id] != mutex);
>
> switch (id) {
> case DDP_COMPONENT_DSI0:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI1:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI2:
> - reg = MUTEX_SOF_DSI2;
> + sof_id = DDP_MUTEX_SOF_DSI2;
> break;
> case DDP_COMPONENT_DSI3:
> - reg = MUTEX_SOF_DSI3;
> + sof_id = DDP_MUTEX_SOF_DSI3;
> break;
> case DDP_COMPONENT_DPI0:
> - reg = MUTEX_SOF_DPI0;
> + sof_id = DDP_MUTEX_SOF_DPI0;
> break;
> case DDP_COMPONENT_DPI1:
> - reg = MUTEX_SOF_DPI1;
> + sof_id = DDP_MUTEX_SOF_DPI1;
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
> @@ -500,7 +531,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> return;
> }
>
> - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + writel_relaxed(ddp->data->mutex_sof[sof_id],
> + ddp->regs + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> }
>
> void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -521,7 +553,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> case DDP_COMPONENT_DPI0:
> case DDP_COMPONENT_DPI1:
> writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + ddp->regs +
> + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: <p.zabel@pengutronix.de>, <robh+dt@kernel.org>,
<matthias.bgg@gmail.com>, <airlied@linux.ie>,
<mark.rutland@arm.com>, <dri-devel@lists.freedesktop.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>, <Bibby.Hsieh@mediatek.com>,
<yt.shen@mediatek.com>
Subject: Re: [PATCH v2 04/25] drm/mediatek: add mutex sof into ddp private data
Date: Thu, 28 Mar 2019 11:02:00 +0800 [thread overview]
Message-ID: <1553742120.14682.3.camel@mtksdaap41> (raw)
In-Reply-To: <1553667561-25447-5-git-send-email-yongqiang.niu@mediatek.com>
Hi, Yongqiang:
On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
>
> mutex0 SOF register offset not always 0x30.
> for mt8183, that offset will be 0x2C,
> add this regsiter offset into private data
I think you do two things in this patch. One is mutex0 SOF register
offset, and another is making sof value variable. So please split this
into two patches.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 51 ++++++++++++++++++++++++++++------
> 1 file changed, 42 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 7f0d46e..495ebc5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -42,12 +42,13 @@
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> #define MT2701_DISP_MUTEX0_MOD0 0x2C
> +#define MT2701_DISP_MUTEX0_SOF0 0x30
>
> #define DISP_REG_MUTEX_EN(n) (0x20 + 0x20 * (n))
> #define DISP_REG_MUTEX(n) (0x24 + 0x20 * (n))
> #define DISP_REG_MUTEX_RST(n) (0x28 + 0x20 * (n))
> #define DISP_REG_MUTEX_MOD(data, n) ((data)->mutex_mod_reg + 0x20 * (n))
> -#define DISP_REG_MUTEX_SOF(n) (0x30 + 0x20 * (n))
> +#define DISP_REG_MUTEX_SOF(data, n) ((data)->mutex_sof_reg + 0x20 * (n))
Even though previous patch's indent is not aligned, I would like you to
align this indent.
Regards,
CK
> #define DISP_REG_MUTEX_MOD2(n) (0x34 + 0x20 * (n))
>
> #define INT_MUTEX BIT(1)
> @@ -149,9 +150,22 @@ struct mtk_disp_mutex {
> bool claimed;
> };
>
> +enum mtk_ddp_mutex_sof_id {
> + DDP_MUTEX_SOF_SINGLE_MODE,
> + DDP_MUTEX_SOF_DSI0,
> + DDP_MUTEX_SOF_DSI1,
> + DDP_MUTEX_SOF_DPI0,
> + DDP_MUTEX_SOF_DPI1,
> + DDP_MUTEX_SOF_DSI2,
> + DDP_MUTEX_SOF_DSI3,
> + DDP_MUTEX_SOF_MAX,
> +};
> +
> struct mtk_ddp_data {
> const unsigned int *mutex_mod;
> + const unsigned int *mutex_sof;
> unsigned int mutex_mod_reg;
> + unsigned int mutex_sof_reg;
> };
>
> struct mtk_ddp {
> @@ -209,19 +223,35 @@ struct mtk_ddp {
> [DDP_COMPONENT_WDMA1] = MT8173_MUTEX_MOD_DISP_WDMA1,
> };
>
> +static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
> + [DDP_MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,
> + [DDP_MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
> + [DDP_MUTEX_SOF_DSI1] = MUTEX_SOF_DSI1,
> + [DDP_MUTEX_SOF_DPI0] = MUTEX_SOF_DPI0,
> + [DDP_MUTEX_SOF_DPI1] = MUTEX_SOF_DPI1,
> + [DDP_MUTEX_SOF_DSI2] = MUTEX_SOF_DSI2,
> + [DDP_MUTEX_SOF_DSI3] = MUTEX_SOF_DSI3,
> +};
> +
> static const struct mtk_ddp_data mt2701_ddp_driver_data = {
> .mutex_mod = mt2701_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt2712_ddp_driver_data = {
> .mutex_mod = mt2712_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static const struct mtk_ddp_data mt8173_ddp_driver_data = {
> .mutex_mod = mt8173_mutex_mod,
> + .mutex_sof = mt2712_mutex_sof,
> .mutex_mod_reg = MT2701_DISP_MUTEX0_MOD0,
> + .mutex_sof_reg = MT2701_DISP_MUTEX0_SOF0,
> };
>
> static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> @@ -462,28 +492,29 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> unsigned int reg;
> + unsigned int sof_id;
> unsigned int offset;
>
> WARN_ON(&ddp->mutex[mutex->id] != mutex);
>
> switch (id) {
> case DDP_COMPONENT_DSI0:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI1:
> - reg = MUTEX_SOF_DSI0;
> + sof_id = DDP_MUTEX_SOF_DSI0;
> break;
> case DDP_COMPONENT_DSI2:
> - reg = MUTEX_SOF_DSI2;
> + sof_id = DDP_MUTEX_SOF_DSI2;
> break;
> case DDP_COMPONENT_DSI3:
> - reg = MUTEX_SOF_DSI3;
> + sof_id = DDP_MUTEX_SOF_DSI3;
> break;
> case DDP_COMPONENT_DPI0:
> - reg = MUTEX_SOF_DPI0;
> + sof_id = DDP_MUTEX_SOF_DPI0;
> break;
> case DDP_COMPONENT_DPI1:
> - reg = MUTEX_SOF_DPI1;
> + sof_id = DDP_MUTEX_SOF_DPI1;
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
> @@ -500,7 +531,8 @@ void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> return;
> }
>
> - writel_relaxed(reg, ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + writel_relaxed(ddp->data->mutex_sof[sof_id],
> + ddp->regs + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> }
>
> void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> @@ -521,7 +553,8 @@ void mtk_disp_mutex_remove_comp(struct mtk_disp_mutex *mutex,
> case DDP_COMPONENT_DPI0:
> case DDP_COMPONENT_DPI1:
> writel_relaxed(MUTEX_SOF_SINGLE_MODE,
> - ddp->regs + DISP_REG_MUTEX_SOF(mutex->id));
> + ddp->regs +
> + DISP_REG_MUTEX_SOF(ddp->data, mutex->id));
> break;
> default:
> if (ddp->data->mutex_mod[id] < 32) {
next prev parent reply other threads:[~2019-03-28 3:02 UTC|newest]
Thread overview: 159+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-27 6:18 [PATCH v2 00/25] add drm support for MT8183 yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 6:18 ` [PATCH v2 01/25] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-28 3:18 ` CK Hu
2019-03-28 3:18 ` CK Hu
2019-03-28 3:18 ` CK Hu
2019-03-27 6:18 ` [PATCH v2 02/25] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 9:39 ` CK Hu
2019-03-27 9:39 ` CK Hu
2019-03-27 9:39 ` CK Hu
2019-03-31 6:42 ` Rob Herring
2019-03-31 6:42 ` Rob Herring
2019-03-31 6:42 ` Rob Herring
[not found] ` <1553667561-25447-1-git-send-email-yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2019-03-27 6:18 ` [PATCH v2 03/25] drm/mediatek: add mutex mod into ddp private data yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w
2019-03-27 6:18 ` yongqiang.niu
2019-03-27 6:18 ` yongqiang.niu
2019-03-28 1:33 ` CK Hu
2019-03-28 1:33 ` CK Hu
2019-03-28 1:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 04/25] drm/mediatek: add mutex sof " yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-28 3:02 ` CK Hu [this message]
2019-03-28 3:02 ` CK Hu
2019-03-28 3:02 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 05/25] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-28 3:37 ` CK Hu
2019-03-28 3:37 ` CK Hu
2019-03-28 3:37 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 06/25] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 6:09 ` CK Hu
2019-04-11 6:09 ` CK Hu
2019-04-11 6:09 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 07/25] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 5:30 ` CK Hu
2019-04-11 5:30 ` CK Hu
2019-04-11 5:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 08/25] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 5:57 ` CK Hu
2019-04-11 5:57 ` CK Hu
2019-04-11 5:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 09/25] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 10:42 ` CK Hu
2019-04-11 10:42 ` CK Hu
2019-04-11 10:42 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 10/25] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 6:14 ` CK Hu
2019-04-11 6:14 ` CK Hu
2019-04-11 6:14 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 11/25] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 12/25] drm/mediatek: add component DITHER yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 6:28 ` CK Hu
2019-04-11 6:28 ` CK Hu
2019-04-11 6:28 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 6:48 ` CK Hu
2019-04-11 6:48 ` CK Hu
2019-04-11 6:48 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 14/25] drm/medaitek: add layer_nr " yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 10:57 ` CK Hu
2019-04-11 10:57 ` CK Hu
2019-04-11 10:57 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 15/25] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 11:01 ` CK Hu
2019-04-11 11:01 ` CK Hu
2019-04-11 11:01 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 16/25] drm/mediatek: add ddp write register common api yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 11:15 ` CK Hu
2019-04-11 11:15 ` CK Hu
2019-04-11 11:15 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 7:38 ` CK Hu
2019-04-16 7:38 ` CK Hu
2019-04-16 7:38 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 8:00 ` CK Hu
2019-04-16 8:00 ` CK Hu
2019-04-16 8:00 ` CK Hu
2019-04-16 8:37 ` Yongqiang Niu
2019-04-16 8:37 ` Yongqiang Niu
2019-04-16 8:37 ` Yongqiang Niu
2019-04-16 11:31 ` YT Shen
2019-04-16 11:31 ` YT Shen
2019-04-16 11:31 ` YT Shen
2019-03-27 6:19 ` [PATCH v2 19/25] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 8:20 ` CK Hu
2019-04-16 8:20 ` CK Hu
2019-04-16 8:20 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 21/25] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-11 10:33 ` CK Hu
2019-04-11 10:33 ` CK Hu
2019-04-11 10:33 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 8:24 ` CK Hu
2019-04-16 8:24 ` CK Hu
2019-04-16 8:24 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 23/25] drm/mediatek: add vmap support for mediatek drm yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 8:30 ` CK Hu
2019-04-16 8:30 ` CK Hu
2019-04-16 8:30 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-04-16 8:33 ` CK Hu
2019-04-16 8:33 ` CK Hu
2019-04-16 8:33 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-05-28 5:35 ` CK Hu
2019-03-27 6:19 ` [PATCH v2 25/25] drm/mediatek: enable allow_fb_modifiers for mediatek drm yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
2019-03-27 6:19 ` yongqiang.niu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1553742120.14682.3.camel@mtksdaap41 \
--to=ck.hu@mediatek.com \
--cc=Bibby.Hsieh@mediatek.com \
--cc=airlied@linux.ie \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=matthias.bgg@gmail.com \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=yongqiang.niu@mediatek.com \
--cc=yt.shen@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.