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From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: <frederic.konrad@adacore.com>, <berto@igalia.com>,
	<qemu-block@nongnu.org>, <arikalo@wavecomp.com>,
	<pasic@linux.ibm.com>, <hpoussin@reactos.org>,
	<anthony.perard@citrix.com>, <xen-devel@lists.xenproject.org>,
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	<eric.auger@redhat.com>, <alex.williamson@redhat.com>,
	<stefanha@redhat.com>,  <jsnow@redhat.com>, <rth@twiddle.net>,
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	<palmer@sifive.com>, <keith.busch@intel.com>,
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	<qemu-riscv@nongnu.org>, <i.mitsyanko@gmail.com>,
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	<kraxel@redhat.com>, <edgar.iglesias@gmail.com>,
	<gxt@mprc.pku.edu.cn>, <robh@kernel.org>,
	<borntraeger@de.ibm.com>, <joel@jms.id.au>,
	<antonynpavlov@gmail.com>, <chouteau@adacore.com>,
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	<walling@linux.ibm.com>,  <dmitry.fleytman@gmail.com>,
	<mst@redhat.com>, <mark.cave-ayland@ilande.co.uk>,
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	<marcandre.lureau@redhat.com>, <alistair@alistair23.me>,
	<paul.durrant@citrix.com>, <david@gibson.dropbear.id.au>,
	<xiaoguangrong.eric@gmail.com>, <huth@tuxfamily.org>,
	<jcd@tribudubois.net>, <pbonzini@redhat.com>,
	<stefanb@linux.ibm.com>
Subject: [Qemu-riscv] [Qemu-devel] [PATCH v6 22/26] memory: Single byte swap along the I/O path
Date: Wed, 7 Aug 2019 08:34:00 +0000	[thread overview]
Message-ID: <1565166840081.62776@bt.com> (raw)
In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net>

[-- Attachment #1: Type: text/plain, Size: 11364 bytes --]

Now that MemOp has been pushed down into the memory API, and
callers are encoding endianness, we can collapse byte swaps
along the I/O path into the accelerator and target independent
adjust_endianness.

Collapsing byte swaps along the I/O path enables additional endian
inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant
byte swaps cancelling out.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
 accel/tcg/cputlb.c     | 42 +++------------------------------
 hw/virtio/virtio-pci.c | 10 ++++----
 memory.c               | 33 ++++++++++----------------
 memory_ldst.inc.c      | 64 --------------------------------------------------
 4 files changed, 19 insertions(+), 130 deletions(-)

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 86d85cc..473b8e6 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1200,38 +1200,6 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
     cpu_loop_exit_atomic(env_cpu(env), retaddr);
 }

-#ifdef TARGET_WORDS_BIGENDIAN
-#define NEED_BE_BSWAP 0
-#define NEED_LE_BSWAP 1
-#else
-#define NEED_BE_BSWAP 1
-#define NEED_LE_BSWAP 0
-#endif
-
-/*
- * Byte Swap Helper
- *
- * This should all dead code away depending on the build host and
- * access type.
- */
-
-static inline uint64_t handle_bswap(uint64_t val, MemOp op)
-{
-    if ((memop_big_endian(op) && NEED_BE_BSWAP) ||
-        (!memop_big_endian(op) && NEED_LE_BSWAP)) {
-        switch (op & MO_SIZE) {
-        case MO_8: return val;
-        case MO_16: return bswap16(val);
-        case MO_32: return bswap32(val);
-        case MO_64: return bswap64(val);
-        default:
-            g_assert_not_reached();
-        }
-    } else {
-        return val;
-    }
-}
-
 /*
  * Load Helpers
  *
@@ -1306,10 +1274,8 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,
             }
         }

-        /* FIXME: io_readx ignores MO_BSWAP.  */
-        res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
-                       mmu_idx, addr, retaddr, access_type, op);
-        return handle_bswap(res, op);
+        return io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
+                        mmu_idx, addr, retaddr, access_type, op);
     }

     /* Handle slow unaligned access (it spans two pages or IO).  */
@@ -1552,10 +1518,8 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,
             }
         }

-        /* FIXME: io_writex ignores MO_BSWAP.  */
         io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,
-                  handle_bswap(val, op),
-                  addr, retaddr, op);
+                  val, addr, retaddr, op);
         return;
     }

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 70eb161..f3fe6ca 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -542,16 +542,15 @@ void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
         val = pci_get_byte(buf);
         break;
     case 2:
-        val = cpu_to_le16(pci_get_word(buf));
+        val = pci_get_word(buf);
         break;
     case 4:
-        val = cpu_to_le32(pci_get_long(buf));
+        val = pci_get_long(buf);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
         return;
     }
-    /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
     memory_region_dispatch_write(mr, addr, val, size_memop(len),
                                  MEMTXATTRS_UNSPECIFIED);
 }
@@ -576,7 +575,6 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
     /* Make sure caller aligned buf properly */
     assert(!(((uintptr_t)buf) & (len - 1)));

-    /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
     memory_region_dispatch_read(mr, addr, &val, size_memop(len),
                                 MEMTXATTRS_UNSPECIFIED);
     switch (len) {
@@ -584,10 +582,10 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
         pci_set_byte(buf, val);
         break;
     case 2:
-        pci_set_word(buf, le16_to_cpu(val));
+        pci_set_word(buf, val);
         break;
     case 4:
-        pci_set_long(buf, le32_to_cpu(val));
+        pci_set_long(buf, val);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
diff --git a/memory.c b/memory.c
index 264c624..9d3c3a6 100644
--- a/memory.c
+++ b/memory.c
@@ -343,32 +343,23 @@ static void flatview_simplify(FlatView *view)
     }
 }

-static bool memory_region_wrong_endianness(MemoryRegion *mr)
+static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
 {
-#ifdef TARGET_WORDS_BIGENDIAN
-    return mr->ops->endianness == MO_LE;
-#else
-    return mr->ops->endianness == MO_BE;
-#endif
-}
-
-static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
-{
-    if (memory_region_wrong_endianness(mr)) {
-        switch (size) {
-        case 1:
+    if ((op & MO_BSWAP) != mr->ops->endianness) {
+        switch (op & MO_SIZE) {
+        case MO_8:
             break;
-        case 2:
+        case MO_16:
             *data = bswap16(*data);
             break;
-        case 4:
+        case MO_32:
             *data = bswap32(*data);
             break;
-        case 8:
+        case MO_64:
             *data = bswap64(*data);
             break;
         default:
-            abort();
+            g_assert_not_reached();
         }
     }
 }
@@ -1446,7 +1437,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
     }

     r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
-    adjust_endianness(mr, pval, size);
+    adjust_endianness(mr, pval, op);
     return r;
 }

@@ -1489,7 +1480,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
         return MEMTX_DECODE_ERROR;
     }

-    adjust_endianness(mr, &data, size);
+    adjust_endianness(mr, &data, op);

     if ((!kvm_eventfds_enabled()) &&
         memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
@@ -2335,7 +2326,7 @@ void memory_region_add_eventfd(MemoryRegion *mr,
     }

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
@@ -2370,7 +2361,7 @@ void memory_region_del_eventfd(MemoryRegion *mr,
     unsigned i;

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index ff28b30..33868f7 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -37,17 +37,7 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_32 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -113,17 +103,7 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_64 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -223,17 +203,7 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_16 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -299,7 +269,6 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | MO_TE, attrs);
     } else {
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -336,17 +305,6 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | endian, attrs);
     } else {
         /* RAM case */
@@ -442,17 +400,6 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 2 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_16 | endian, attrs);
     } else {
         /* RAM case */
@@ -516,17 +463,6 @@ static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 8 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_64 | endian, attrs);
     } else {
         /* RAM case */
--
1.8.3.1

?


[-- Attachment #2: Type: text/html, Size: 20900 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: fam@euphon.net, peter.maydell@linaro.org, walling@linux.ibm.com,
	cohuck@redhat.com, sagark@eecs.berkeley.edu, david@redhat.com,
	jasowang@redhat.com, palmer@sifive.com,
	mark.cave-ayland@ilande.co.uk, i.mitsyanko@gmail.com,
	keith.busch@intel.com, jcmvbkbc@gmail.com,
	frederic.konrad@adacore.com, dmitry.fleytman@gmail.com,
	kraxel@redhat.com, edgar.iglesias@gmail.com, gxt@mprc.pku.edu.cn,
	pburton@wavecomp.com, xiaoguangrong.eric@gmail.com,
	peter.chubb@nicta.com.au, philmd@redhat.com, robh@kernel.org,
	hare@suse.com, sstabellini@kernel.org, berto@igalia.com,
	chouteau@adacore.com, qemu-block@nongnu.org,
	arikalo@wavecomp.com, jslaby@suse.cz, deller@gmx.de,
	mst@redhat.com, magnus.damm@gmail.com, jcd@tribudubois.net,
	pasic@linux.ibm.com, borntraeger@de.ibm.com, mreitz@redhat.com,
	hpoussin@reactos.org, joel@jms.id.au, anthony.perard@citrix.com,
	xen-devel@lists.xenproject.org, david@gibson.dropbear.id.au,
	lersek@redhat.com, green@moxielogic.com, atar4qemu@gmail.com,
	antonynpavlov@gmail.com, marex@denx.de, jiri@resnulli.us,
	ehabkost@redhat.com, minyard@acm.org, qemu-s390x@nongnu.org,
	sw@weilnetz.de, alistair@alistair23.me, yuval.shaia@oracle.com,
	b.galvani@gmail.com, eric.auger@redhat.com,
	alex.williamson@redhat.com, qemu-arm@nongnu.org,
	jan.kiszka@web.de, clg@kaod.org, stefanha@redhat.com,
	marcandre.lureau@redhat.com, shorne@gmail.com, jsnow@redhat.com,
	rth@twiddle.net, kwolf@redhat.com, qemu-riscv@nongnu.org,
	proljc@gmail.com, pbonzini@redhat.com, andrew@aj.id.au,
	kbastian@mail.uni-paderborn.de, crwulff@gmail.com,
	laurent@vivier.eu, Andrew.Baumann@microsoft.com,
	sundeep.lkml@gmail.com, andrew.smirnov@gmail.com,
	michael@walle.cc, paul.durrant@citrix.com, qemu-ppc@nongnu.org,
	huth@tuxfamily.org, amarkovic@wavecomp.com, imammedo@redhat.com,
	aurelien@aurel32.net, stefanb@linux.ibm.com
Subject: [Qemu-devel] [PATCH v6 22/26] memory: Single byte swap along the I/O path
Date: Wed, 7 Aug 2019 08:34:00 +0000	[thread overview]
Message-ID: <1565166840081.62776@bt.com> (raw)
In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net>

Now that MemOp has been pushed down into the memory API, and
callers are encoding endianness, we can collapse byte swaps
along the I/O path into the accelerator and target independent
adjust_endianness.

Collapsing byte swaps along the I/O path enables additional endian
inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant
byte swaps cancelling out.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
 accel/tcg/cputlb.c     | 42 +++------------------------------
 hw/virtio/virtio-pci.c | 10 ++++----
 memory.c               | 33 ++++++++++----------------
 memory_ldst.inc.c      | 64 --------------------------------------------------
 4 files changed, 19 insertions(+), 130 deletions(-)

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 86d85cc..473b8e6 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1200,38 +1200,6 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
     cpu_loop_exit_atomic(env_cpu(env), retaddr);
 }

-#ifdef TARGET_WORDS_BIGENDIAN
-#define NEED_BE_BSWAP 0
-#define NEED_LE_BSWAP 1
-#else
-#define NEED_BE_BSWAP 1
-#define NEED_LE_BSWAP 0
-#endif
-
-/*
- * Byte Swap Helper
- *
- * This should all dead code away depending on the build host and
- * access type.
- */
-
-static inline uint64_t handle_bswap(uint64_t val, MemOp op)
-{
-    if ((memop_big_endian(op) && NEED_BE_BSWAP) ||
-        (!memop_big_endian(op) && NEED_LE_BSWAP)) {
-        switch (op & MO_SIZE) {
-        case MO_8: return val;
-        case MO_16: return bswap16(val);
-        case MO_32: return bswap32(val);
-        case MO_64: return bswap64(val);
-        default:
-            g_assert_not_reached();
-        }
-    } else {
-        return val;
-    }
-}
-
 /*
  * Load Helpers
  *
@@ -1306,10 +1274,8 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,
             }
         }

-        /* FIXME: io_readx ignores MO_BSWAP.  */
-        res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
-                       mmu_idx, addr, retaddr, access_type, op);
-        return handle_bswap(res, op);
+        return io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
+                        mmu_idx, addr, retaddr, access_type, op);
     }

     /* Handle slow unaligned access (it spans two pages or IO).  */
@@ -1552,10 +1518,8 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,
             }
         }

-        /* FIXME: io_writex ignores MO_BSWAP.  */
         io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,
-                  handle_bswap(val, op),
-                  addr, retaddr, op);
+                  val, addr, retaddr, op);
         return;
     }

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 70eb161..f3fe6ca 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -542,16 +542,15 @@ void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
         val = pci_get_byte(buf);
         break;
     case 2:
-        val = cpu_to_le16(pci_get_word(buf));
+        val = pci_get_word(buf);
         break;
     case 4:
-        val = cpu_to_le32(pci_get_long(buf));
+        val = pci_get_long(buf);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
         return;
     }
-    /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
     memory_region_dispatch_write(mr, addr, val, size_memop(len),
                                  MEMTXATTRS_UNSPECIFIED);
 }
@@ -576,7 +575,6 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
     /* Make sure caller aligned buf properly */
     assert(!(((uintptr_t)buf) & (len - 1)));

-    /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
     memory_region_dispatch_read(mr, addr, &val, size_memop(len),
                                 MEMTXATTRS_UNSPECIFIED);
     switch (len) {
@@ -584,10 +582,10 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
         pci_set_byte(buf, val);
         break;
     case 2:
-        pci_set_word(buf, le16_to_cpu(val));
+        pci_set_word(buf, val);
         break;
     case 4:
-        pci_set_long(buf, le32_to_cpu(val));
+        pci_set_long(buf, val);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
diff --git a/memory.c b/memory.c
index 264c624..9d3c3a6 100644
--- a/memory.c
+++ b/memory.c
@@ -343,32 +343,23 @@ static void flatview_simplify(FlatView *view)
     }
 }

-static bool memory_region_wrong_endianness(MemoryRegion *mr)
+static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
 {
-#ifdef TARGET_WORDS_BIGENDIAN
-    return mr->ops->endianness == MO_LE;
-#else
-    return mr->ops->endianness == MO_BE;
-#endif
-}
-
-static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
-{
-    if (memory_region_wrong_endianness(mr)) {
-        switch (size) {
-        case 1:
+    if ((op & MO_BSWAP) != mr->ops->endianness) {
+        switch (op & MO_SIZE) {
+        case MO_8:
             break;
-        case 2:
+        case MO_16:
             *data = bswap16(*data);
             break;
-        case 4:
+        case MO_32:
             *data = bswap32(*data);
             break;
-        case 8:
+        case MO_64:
             *data = bswap64(*data);
             break;
         default:
-            abort();
+            g_assert_not_reached();
         }
     }
 }
@@ -1446,7 +1437,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
     }

     r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
-    adjust_endianness(mr, pval, size);
+    adjust_endianness(mr, pval, op);
     return r;
 }

@@ -1489,7 +1480,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
         return MEMTX_DECODE_ERROR;
     }

-    adjust_endianness(mr, &data, size);
+    adjust_endianness(mr, &data, op);

     if ((!kvm_eventfds_enabled()) &&
         memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
@@ -2335,7 +2326,7 @@ void memory_region_add_eventfd(MemoryRegion *mr,
     }

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
@@ -2370,7 +2361,7 @@ void memory_region_del_eventfd(MemoryRegion *mr,
     unsigned i;

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index ff28b30..33868f7 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -37,17 +37,7 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_32 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -113,17 +103,7 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_64 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -223,17 +203,7 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_16 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -299,7 +269,6 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | MO_TE, attrs);
     } else {
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -336,17 +305,6 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | endian, attrs);
     } else {
         /* RAM case */
@@ -442,17 +400,6 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 2 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_16 | endian, attrs);
     } else {
         /* RAM case */
@@ -516,17 +463,6 @@ static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 8 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_64 | endian, attrs);
     } else {
         /* RAM case */
--
1.8.3.1

?

WARNING: multiple messages have this Message-ID (diff)
From: <tony.nguyen@bt.com>
To: <qemu-devel@nongnu.org>
Cc: fam@euphon.net, peter.maydell@linaro.org, walling@linux.ibm.com,
	cohuck@redhat.com, sagark@eecs.berkeley.edu, david@redhat.com,
	jasowang@redhat.com, palmer@sifive.com,
	mark.cave-ayland@ilande.co.uk, i.mitsyanko@gmail.com,
	keith.busch@intel.com, jcmvbkbc@gmail.com,
	frederic.konrad@adacore.com, dmitry.fleytman@gmail.com,
	kraxel@redhat.com, edgar.iglesias@gmail.com, gxt@mprc.pku.edu.cn,
	pburton@wavecomp.com, xiaoguangrong.eric@gmail.com,
	peter.chubb@nicta.com.au, philmd@redhat.com, robh@kernel.org,
	hare@suse.com, sstabellini@kernel.org, berto@igalia.com,
	chouteau@adacore.com, qemu-block@nongnu.org,
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	xen-devel@lists.xenproject.org, david@gibson.dropbear.id.au,
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	antonynpavlov@gmail.com, marex@denx.de, jiri@resnulli.us,
	ehabkost@redhat.com, minyard@acm.org, qemu-s390x@nongnu.org,
	sw@weilnetz.de, alistair@alistair23.me, yuval.shaia@oracle.com,
	b.galvani@gmail.com, eric.auger@redhat.com,
	alex.williamson@redhat.com, qemu-arm@nongnu.org,
	jan.kiszka@web.de, clg@kaod.org, stefanha@redhat.com,
	marcandre.lureau@redhat.com, shorne@gmail.com, jsnow@redhat.com,
	rth@twiddle.net, kwolf@redhat.com, qemu-riscv@nongnu.org,
	proljc@gmail.com, pbonzini@redhat.com, andrew@aj.id.au,
	kbastian@mail.uni-paderborn.de, crwulff@gmail.com,
	laurent@vivier.eu, Andrew.Baumann@microsoft.com,
	sundeep.lkml@gmail.com, andrew.smirnov@gmail.com,
	michael@walle.cc, paul.durrant@citrix.com, qemu-ppc@nongnu.org,
	huth@tuxfamily.org, amarkovic@wavecomp.com, imammedo@redhat.com,
	aurelien@aurel32.net, stefanb@linux.ibm.com
Subject: [Xen-devel] [Qemu-devel] [PATCH v6 22/26] memory: Single byte swap along the I/O path
Date: Wed, 7 Aug 2019 08:34:00 +0000	[thread overview]
Message-ID: <1565166840081.62776@bt.com> (raw)
In-Reply-To: <45ec4924e0b34a3d9124e2db06af75b4@tpw09926dag18e.domain1.systemhost.net>


[-- Attachment #1.1: Type: text/plain, Size: 11364 bytes --]

Now that MemOp has been pushed down into the memory API, and
callers are encoding endianness, we can collapse byte swaps
along the I/O path into the accelerator and target independent
adjust_endianness.

Collapsing byte swaps along the I/O path enables additional endian
inversion logic, e.g. SPARC64 Invert Endian TTE bit, with redundant
byte swaps cancelling out.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com>
---
 accel/tcg/cputlb.c     | 42 +++------------------------------
 hw/virtio/virtio-pci.c | 10 ++++----
 memory.c               | 33 ++++++++++----------------
 memory_ldst.inc.c      | 64 --------------------------------------------------
 4 files changed, 19 insertions(+), 130 deletions(-)

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 86d85cc..473b8e6 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1200,38 +1200,6 @@ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
     cpu_loop_exit_atomic(env_cpu(env), retaddr);
 }

-#ifdef TARGET_WORDS_BIGENDIAN
-#define NEED_BE_BSWAP 0
-#define NEED_LE_BSWAP 1
-#else
-#define NEED_BE_BSWAP 1
-#define NEED_LE_BSWAP 0
-#endif
-
-/*
- * Byte Swap Helper
- *
- * This should all dead code away depending on the build host and
- * access type.
- */
-
-static inline uint64_t handle_bswap(uint64_t val, MemOp op)
-{
-    if ((memop_big_endian(op) && NEED_BE_BSWAP) ||
-        (!memop_big_endian(op) && NEED_LE_BSWAP)) {
-        switch (op & MO_SIZE) {
-        case MO_8: return val;
-        case MO_16: return bswap16(val);
-        case MO_32: return bswap32(val);
-        case MO_64: return bswap64(val);
-        default:
-            g_assert_not_reached();
-        }
-    } else {
-        return val;
-    }
-}
-
 /*
  * Load Helpers
  *
@@ -1306,10 +1274,8 @@ load_helper(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi,
             }
         }

-        /* FIXME: io_readx ignores MO_BSWAP.  */
-        res = io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
-                       mmu_idx, addr, retaddr, access_type, op);
-        return handle_bswap(res, op);
+        return io_readx(env, &env_tlb(env)->d[mmu_idx].iotlb[index],
+                        mmu_idx, addr, retaddr, access_type, op);
     }

     /* Handle slow unaligned access (it spans two pages or IO).  */
@@ -1552,10 +1518,8 @@ store_helper(CPUArchState *env, target_ulong addr, uint64_t val,
             }
         }

-        /* FIXME: io_writex ignores MO_BSWAP.  */
         io_writex(env, &env_tlb(env)->d[mmu_idx].iotlb[index], mmu_idx,
-                  handle_bswap(val, op),
-                  addr, retaddr, op);
+                  val, addr, retaddr, op);
         return;
     }

diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 70eb161..f3fe6ca 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -542,16 +542,15 @@ void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
         val = pci_get_byte(buf);
         break;
     case 2:
-        val = cpu_to_le16(pci_get_word(buf));
+        val = pci_get_word(buf);
         break;
     case 4:
-        val = cpu_to_le32(pci_get_long(buf));
+        val = pci_get_long(buf);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
         return;
     }
-    /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
     memory_region_dispatch_write(mr, addr, val, size_memop(len),
                                  MEMTXATTRS_UNSPECIFIED);
 }
@@ -576,7 +575,6 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
     /* Make sure caller aligned buf properly */
     assert(!(((uintptr_t)buf) & (len - 1)));

-    /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
     memory_region_dispatch_read(mr, addr, &val, size_memop(len),
                                 MEMTXATTRS_UNSPECIFIED);
     switch (len) {
@@ -584,10 +582,10 @@ virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
         pci_set_byte(buf, val);
         break;
     case 2:
-        pci_set_word(buf, le16_to_cpu(val));
+        pci_set_word(buf, val);
         break;
     case 4:
-        pci_set_long(buf, le32_to_cpu(val));
+        pci_set_long(buf, val);
         break;
     default:
         /* As length is under guest control, handle illegal values. */
diff --git a/memory.c b/memory.c
index 264c624..9d3c3a6 100644
--- a/memory.c
+++ b/memory.c
@@ -343,32 +343,23 @@ static void flatview_simplify(FlatView *view)
     }
 }

-static bool memory_region_wrong_endianness(MemoryRegion *mr)
+static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
 {
-#ifdef TARGET_WORDS_BIGENDIAN
-    return mr->ops->endianness == MO_LE;
-#else
-    return mr->ops->endianness == MO_BE;
-#endif
-}
-
-static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
-{
-    if (memory_region_wrong_endianness(mr)) {
-        switch (size) {
-        case 1:
+    if ((op & MO_BSWAP) != mr->ops->endianness) {
+        switch (op & MO_SIZE) {
+        case MO_8:
             break;
-        case 2:
+        case MO_16:
             *data = bswap16(*data);
             break;
-        case 4:
+        case MO_32:
             *data = bswap32(*data);
             break;
-        case 8:
+        case MO_64:
             *data = bswap64(*data);
             break;
         default:
-            abort();
+            g_assert_not_reached();
         }
     }
 }
@@ -1446,7 +1437,7 @@ MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
     }

     r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
-    adjust_endianness(mr, pval, size);
+    adjust_endianness(mr, pval, op);
     return r;
 }

@@ -1489,7 +1480,7 @@ MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
         return MEMTX_DECODE_ERROR;
     }

-    adjust_endianness(mr, &data, size);
+    adjust_endianness(mr, &data, op);

     if ((!kvm_eventfds_enabled()) &&
         memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
@@ -2335,7 +2326,7 @@ void memory_region_add_eventfd(MemoryRegion *mr,
     }

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
@@ -2370,7 +2361,7 @@ void memory_region_del_eventfd(MemoryRegion *mr,
     unsigned i;

     if (size) {
-        adjust_endianness(mr, &mrfd.data, size);
+        adjust_endianness(mr, &mrfd.data, size_memop(size));
     }
     memory_region_transaction_begin();
     for (i = 0; i < mr->ioeventfd_nb; ++i) {
diff --git a/memory_ldst.inc.c b/memory_ldst.inc.c
index ff28b30..33868f7 100644
--- a/memory_ldst.inc.c
+++ b/memory_ldst.inc.c
@@ -37,17 +37,7 @@ static inline uint32_t glue(address_space_ldl_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_32 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -113,17 +103,7 @@ static inline uint64_t glue(address_space_ldq_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_64 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -223,17 +203,7 @@ static inline uint32_t glue(address_space_lduw_internal, SUFFIX)(ARG1_DECL,
         release_lock |= prepare_mmio_access(mr);

         /* I/O case */
-        /* FIXME: memory_region_dispatch_read ignores MO_BSWAP.  */
         r = memory_region_dispatch_read(mr, addr1, &val, MO_16 | endian, attrs);
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
     } else {
         /* RAM case */
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -299,7 +269,6 @@ void glue(address_space_stl_notdirty, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | MO_TE, attrs);
     } else {
         ptr = qemu_map_ram_ptr(mr->ram_block, addr1);
@@ -336,17 +305,6 @@ static inline void glue(address_space_stl_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 4 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap32(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap32(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_32 | endian, attrs);
     } else {
         /* RAM case */
@@ -442,17 +400,6 @@ static inline void glue(address_space_stw_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 2 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap16(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap16(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_16 | endian, attrs);
     } else {
         /* RAM case */
@@ -516,17 +463,6 @@ static void glue(address_space_stq_internal, SUFFIX)(ARG1_DECL,
     mr = TRANSLATE(addr, &addr1, &l, true, attrs);
     if (l < 8 || !memory_access_is_direct(mr, true)) {
         release_lock |= prepare_mmio_access(mr);
-
-#if defined(TARGET_WORDS_BIGENDIAN)
-        if (endian == MO_LE) {
-            val = bswap64(val);
-        }
-#else
-        if (endian == MO_BE) {
-            val = bswap64(val);
-        }
-#endif
-        /* FIXME: memory_region_dispatch_write ignores MO_BSWAP.  */
         r = memory_region_dispatch_write(mr, addr1, val, MO_64 | endian, attrs);
     } else {
         /* RAM case */
--
1.8.3.1

?


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[-- Attachment #2: Type: text/plain, Size: 157 bytes --]

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  parent reply	other threads:[~2019-08-07 13:05 UTC|newest]

Thread overview: 182+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-07  8:23 [Qemu-riscv] [Qemu-devel] [PATCH v6 00/26] Invert Endian bit in SPARCv9 MMU TTE tony.nguyen
2019-08-07  8:23 ` [Xen-devel] " tony.nguyen
2019-08-07  8:23 ` [Qemu-arm] " tony.nguyen
2019-08-07  8:25 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 01/26] configure: Define TARGET_ALIGNED_ONLY tony.nguyen
2019-08-07  8:25   ` [Xen-devel] " tony.nguyen
2019-08-07  8:25   ` [Qemu-arm] " tony.nguyen
2019-08-08 14:08   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:08     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:08     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:26 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 02/26] tcg: TCGMemOp is now accelerator independent MemOp tony.nguyen
2019-08-07  8:26   ` [Xen-devel] " tony.nguyen
2019-08-07  8:26   ` [Qemu-arm] " tony.nguyen
2019-08-08 14:14   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:14     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:14     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:26 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 03/26] memory: Introduce size_memop tony.nguyen
2019-08-07  8:26   ` [Xen-devel] " tony.nguyen
2019-08-07  8:26   ` [Qemu-arm] " tony.nguyen
2019-08-07 15:30   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:30     ` [Xen-devel] " Richard Henderson
2019-08-07 15:30     ` Richard Henderson
2019-08-07  8:27 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 04/26] target/mips: Access MemoryRegion with MemOp tony.nguyen
2019-08-07  8:27   ` [Xen-devel] " tony.nguyen
2019-08-07  8:27   ` [Qemu-arm] " tony.nguyen
2019-08-07 12:50   ` [Qemu-riscv] " tony.nguyen
2019-08-07 12:50     ` [Xen-devel] " tony.nguyen
2019-08-07 12:50     ` [Qemu-arm] " tony.nguyen
2019-08-07  8:27 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 05/26] hw/s390x: " tony.nguyen
2019-08-07  8:27   ` [Xen-devel] " tony.nguyen
2019-08-07  8:27   ` [Qemu-arm] " tony.nguyen
2019-08-08 14:31   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:31     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:31     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:27 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 06/26] hw/intc/armv7m_nic: " tony.nguyen
2019-08-07  8:27   ` [Xen-devel] " tony.nguyen
2019-08-07  8:27   ` [Qemu-arm] " tony.nguyen
2019-08-07 12:54   ` [Qemu-riscv] " tony.nguyen
2019-08-07 12:54     ` [Xen-devel] " tony.nguyen
2019-08-07 12:54     ` [Qemu-arm] " tony.nguyen
2019-08-07  8:28 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 07/26] hw/virtio: " tony.nguyen
2019-08-07  8:28   ` [Xen-devel] " tony.nguyen
2019-08-07  8:28   ` [Qemu-arm] " tony.nguyen
2019-08-08 14:32   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:32     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:32     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:28 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 08/26] hw/vfio: " tony.nguyen
2019-08-07  8:28   ` [Xen-devel] " tony.nguyen
2019-08-07  8:28   ` [Qemu-arm] " tony.nguyen
2019-08-08 14:34   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:34     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:34     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:28 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 09/26] exec: " tony.nguyen
2019-08-07  8:28   ` [Xen-devel] " tony.nguyen
2019-08-07  8:28   ` [Qemu-arm] " tony.nguyen
2019-08-07 12:56   ` [Qemu-riscv] " tony.nguyen
2019-08-07 12:56     ` [Xen-devel] " tony.nguyen
2019-08-07 12:56     ` [Qemu-arm] " tony.nguyen
2019-08-07  8:29 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 10/26] cputlb: " tony.nguyen
2019-08-07  8:29   ` [Xen-devel] " tony.nguyen
2019-08-07  8:29   ` [Qemu-arm] " tony.nguyen
2019-08-07 12:45   ` [Qemu-riscv] " tony.nguyen
2019-08-07 12:45     ` [Xen-devel] " tony.nguyen
2019-08-07 12:45     ` [Qemu-arm] " tony.nguyen
2019-08-07 15:32   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:32     ` [Xen-devel] " Richard Henderson
2019-08-07 15:32     ` [Qemu-arm] " Richard Henderson
2019-08-07  8:29 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 11/26] memory: " tony.nguyen
2019-08-07  8:29   ` [Xen-devel] " tony.nguyen
2019-08-07  8:29   ` tony.nguyen
2019-08-07 15:38   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:38     ` [Xen-devel] " Richard Henderson
2019-08-07 15:38     ` [Qemu-arm] " Richard Henderson
2019-08-07  8:30 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 12/26] hw/s390x: Hard code size with MO_{8|16|32|64} tony.nguyen
2019-08-07  8:30   ` [Xen-devel] " tony.nguyen
2019-08-07  8:30   ` tony.nguyen
2019-08-07 15:47   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:47     ` [Xen-devel] " Richard Henderson
2019-08-07 15:47     ` Richard Henderson
2019-08-08 14:44   ` [Qemu-riscv] " Cornelia Huck
2019-08-08 14:44     ` [Xen-devel] " Cornelia Huck
2019-08-08 14:44     ` [Qemu-arm] " Cornelia Huck
2019-08-07  8:30 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 13/26] target/mips: " tony.nguyen
2019-08-07  8:30   ` [Xen-devel] " tony.nguyen
2019-08-07  8:30   ` [Qemu-arm] " tony.nguyen
2019-08-07 15:47   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:47     ` [Xen-devel] " Richard Henderson
2019-08-07 15:47     ` [Qemu-arm] " Richard Henderson
2019-08-07  8:30 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 14/26] exec: " tony.nguyen
2019-08-07  8:30   ` [Xen-devel] " tony.nguyen
2019-08-07  8:30   ` [Qemu-arm] " tony.nguyen
2019-08-07 15:48   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:48     ` [Xen-devel] " Richard Henderson
2019-08-07 15:48     ` [Qemu-arm] " Richard Henderson
2019-08-07  8:31 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 15/26] build: Correct non-common common-obj-* to obj-* tony.nguyen
2019-08-07  8:31   ` [Xen-devel] " tony.nguyen
2019-08-07  8:31   ` [Qemu-arm] " tony.nguyen
2019-08-07 10:42   ` [Qemu-riscv] " Paolo Bonzini
2019-08-07 10:42     ` [Xen-devel] " Paolo Bonzini
2019-08-07 10:42     ` [Qemu-arm] " Paolo Bonzini
2019-08-07  8:31 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 16/26] exec: Map device_endian onto MemOp tony.nguyen
2019-08-07  8:31   ` [Xen-devel] " tony.nguyen
2019-08-07  8:31   ` [Qemu-arm] " tony.nguyen
2019-08-07 15:55   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:55     ` [Xen-devel] " Richard Henderson
2019-08-07 15:55     ` [Qemu-arm] " Richard Henderson
2019-08-07 15:59   ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:59     ` [Xen-devel] " Richard Henderson
2019-08-07 15:59     ` Richard Henderson
2019-08-07 16:06     ` [Qemu-riscv] " Richard Henderson
2019-08-07 16:06       ` [Xen-devel] " Richard Henderson
2019-08-07 16:06       ` [Qemu-arm] " Richard Henderson
2019-08-07  8:31 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 17/26] exec: Replace device_endian with MemOp tony.nguyen
2019-08-07  8:31   ` [Qemu-arm] " tony.nguyen
2019-08-07 16:23   ` [Qemu-riscv] " Richard Henderson
2019-08-07 16:23     ` [Xen-devel] " Richard Henderson
2019-08-07 16:23     ` Richard Henderson
2019-08-09  0:35   ` [Qemu-riscv] " David Gibson
2019-08-09  0:35     ` [Xen-devel] " David Gibson
2019-08-09  0:35     ` [Qemu-arm] " David Gibson
2019-08-07  8:32 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 18/26] exec: Delete device_endian tony.nguyen
2019-08-07  8:32   ` [Xen-devel] " tony.nguyen
2019-08-07  8:32   ` [Qemu-arm] " tony.nguyen
2019-08-07 16:23   ` [Qemu-riscv] " Richard Henderson
2019-08-07 16:23     ` [Xen-devel] " Richard Henderson
2019-08-07 16:23     ` Richard Henderson
2019-08-07  8:32 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 19/26] exec: Delete DEVICE_HOST_ENDIAN tony.nguyen
2019-08-07  8:32   ` [Xen-devel] " tony.nguyen
2019-08-07  8:32   ` [Qemu-arm] " tony.nguyen
2019-08-07 10:22   ` [Qemu-riscv] " Paolo Bonzini
2019-08-07 10:22     ` [Xen-devel] " Paolo Bonzini
2019-08-07 10:22     ` Paolo Bonzini
2019-08-07 15:03     ` [Qemu-riscv] " Richard Henderson
2019-08-07 15:03       ` [Xen-devel] " Richard Henderson
2019-08-07 15:03       ` [Qemu-arm] " Richard Henderson
2019-08-07  8:33 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 20/26] memory: Access MemoryRegion with endianness tony.nguyen
2019-08-07  8:33   ` [Xen-devel] " tony.nguyen
2019-08-07  8:33   ` [Qemu-arm] " tony.nguyen
2019-08-07 10:27   ` [Qemu-riscv] " Paolo Bonzini
2019-08-07 10:27     ` [Xen-devel] " Paolo Bonzini
2019-08-07 10:27     ` Paolo Bonzini
2019-08-07 17:49   ` [Qemu-riscv] " Richard Henderson
2019-08-07 17:49     ` [Xen-devel] " Richard Henderson
2019-08-07 17:49     ` [Qemu-arm] " Richard Henderson
2019-08-07 18:00     ` [Qemu-riscv] " Paolo Bonzini
2019-08-07 18:00       ` [Xen-devel] " Paolo Bonzini
2019-08-07 18:00       ` [Qemu-arm] " Paolo Bonzini
2019-08-07 18:23       ` [Qemu-riscv] " Richard Henderson
2019-08-07 18:23         ` [Xen-devel] " Richard Henderson
2019-08-07 18:23         ` [Qemu-arm] " Richard Henderson
2019-08-07  8:33 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 21/26] cputlb: Replace size and endian operands for MemOp tony.nguyen
2019-08-07  8:33   ` [Xen-devel] " tony.nguyen
2019-08-07  8:33   ` [Qemu-arm] " tony.nguyen
2019-08-07 17:38   ` [Qemu-riscv] " Richard Henderson
2019-08-07 17:38     ` [Xen-devel] " Richard Henderson
2019-08-07 17:38     ` [Qemu-arm] " Richard Henderson
2019-08-07  8:34 ` tony.nguyen [this message]
2019-08-07  8:34   ` [Xen-devel] [Qemu-devel] [PATCH v6 22/26] memory: Single byte swap along the I/O path tony.nguyen
2019-08-07  8:34   ` tony.nguyen
2019-08-07  8:34 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 23/26] cpu: TLB_FLAGS_MASK bit to force memory slow path tony.nguyen
2019-08-07  8:34   ` [Xen-devel] " tony.nguyen
2019-08-07  8:34   ` tony.nguyen
2019-08-07  8:34 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 24/26] cputlb: Byte swap memory transaction attribute tony.nguyen
2019-08-07  8:34   ` [Xen-devel] " tony.nguyen
2019-08-07  8:34   ` tony.nguyen
2019-08-07  8:35 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 25/26] target/sparc: Add TLB entry with attributes tony.nguyen
2019-08-07  8:35   ` [Xen-devel] " tony.nguyen
2019-08-07  8:35   ` tony.nguyen
2019-08-07  8:35 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 26/26] target/sparc: sun4u Invert Endian TTE bit tony.nguyen
2019-08-07  8:35   ` [Xen-devel] " tony.nguyen
2019-08-07  8:35   ` [Qemu-arm] " tony.nguyen
2019-08-07 13:04   ` [Qemu-riscv] " tony.nguyen
2019-08-07 13:04     ` [Xen-devel] " tony.nguyen
2019-08-07 13:04     ` [Qemu-arm] " tony.nguyen
2019-08-07 10:37 ` [Qemu-riscv] [Qemu-devel] [PATCH v6 00/26] Invert Endian bit in SPARCv9 MMU TTE Philippe Mathieu-Daudé
2019-08-07 10:37   ` [Xen-devel] " Philippe Mathieu-Daudé
2019-08-07 10:37   ` [Qemu-arm] " Philippe Mathieu-Daudé
2019-08-07 12:41   ` [Qemu-riscv] " tony.nguyen
2019-08-07 12:41     ` [Xen-devel] " tony.nguyen
2019-08-07 12:41     ` [Qemu-arm] " tony.nguyen
2019-08-07 12:54     ` [Qemu-riscv] " Philippe Mathieu-Daudé
2019-08-07 12:54       ` [Xen-devel] " Philippe Mathieu-Daudé
2019-08-07 12:54       ` Philippe Mathieu-Daudé

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