All of lore.kernel.org
 help / color / mirror / Atom feed
From: Luwei Kang <luwei.kang@intel.com>
To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: pbonzini@redhat.com, rkrcmar@redhat.com,
	sean.j.christopherson@intel.com, vkuznets@redhat.com,
	wanpengli@tencent.com, jmattson@google.com, joro@8bytes.org,
	tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	hpa@zytor.com, x86@kernel.org, ak@linux.intel.com,
	thomas.lendacky@amd.com, peterz@infradead.org, acme@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@redhat.com, namhyung@kernel.org,
	Luwei Kang <luwei.kang@intel.com>
Subject: [PATCH v1 0/8] PEBS enabling in KVM guest
Date: Sun, 27 Oct 2019 19:11:09 -0400	[thread overview]
Message-ID: <1572217877-26484-1-git-send-email-luwei.kang@intel.com> (raw)

Intel new hardware introduces some Precise Event-Based Sampling(PEBS)
extensions that output the PEBS record to Intel PT stream instead of
DS area. The PEBS record will be packaged in a specific format when
outputting to Intel PT. This patch set will enable PEBS functionality
in KVM Guest by PEBS output to Intel PT.

The patch 1 introduce a MSRs "base" parameter that use for get the
kvm_pmc structure by New MSR_RELOAD_FIXED_CTRx like get_gp_pmc()
function. The patch 2 implement the PEBS MSRs read/write emulation.
Patch 5/6/7 expose some capabilities(CPUID, MSRs) to KVM guest which
relate with PEBS feature. Patch 3 introduces "pebs" parameter to
allocate a perf event counter from host perf event framework.
The counter using for PEBS event should be disabled before VM-entry
in the previous platform, patch 4 skip this operation when PEBS is
enabled in KVM guest. Patch 8 has some code changes in native that to
make the aux_event only be needed for a non-kernel event(the couner
allocate by KVM is kernel event).

Luwei Kang (8):
  KVM: x86: Add base address parameter for get_fixed_pmc function
  KVM: x86: PEBS output to Intel PT MSRs emulation
  KVM: x86: Allocate performance counter for PEBS event
  KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest
  KVM: X86: Expose PDCM cpuid to guest
  KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation
  KVM: x86: Expose PEBS feature to guest
  perf/x86: Add event owner check when PEBS output to Intel PT

 arch/x86/events/core.c            |  3 +-
 arch/x86/events/intel/core.c      | 19 ++++++----
 arch/x86/events/perf_event.h      |  2 +-
 arch/x86/include/asm/kvm_host.h   |  7 ++++
 arch/x86/include/asm/msr-index.h  |  9 +++++
 arch/x86/include/asm/perf_event.h |  5 ++-
 arch/x86/kvm/cpuid.c              |  3 +-
 arch/x86/kvm/pmu.c                | 23 ++++++++----
 arch/x86/kvm/pmu.h                | 10 ++---
 arch/x86/kvm/pmu_amd.c            |  2 +-
 arch/x86/kvm/svm.c                | 12 ++++++
 arch/x86/kvm/vmx/capabilities.h   | 25 +++++++++++++
 arch/x86/kvm/vmx/pmu_intel.c      | 79 +++++++++++++++++++++++++++++++++++----
 arch/x86/kvm/vmx/vmx.c            | 19 +++++++++-
 arch/x86/kvm/x86.c                | 22 ++++++++---
 include/linux/perf_event.h        |  1 +
 kernel/events/core.c              |  2 +-
 17 files changed, 201 insertions(+), 42 deletions(-)

-- 
1.8.3.1


             reply	other threads:[~2019-10-27 11:12 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-27 23:11 Luwei Kang [this message]
2019-10-27 23:11 ` [PATCH v1 1/8] KVM: x86: Add base address parameter for get_fixed_pmc function Luwei Kang
2019-10-27 23:11 ` [PATCH v1 2/8] KVM: x86: PEBS output to Intel PT MSRs emulation Luwei Kang
2019-10-29 15:02   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS event Luwei Kang
2019-10-29 14:46   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-30  6:42       ` Alexander Shishkin
2019-10-30  6:49         ` Kang, Luwei
2019-10-30  9:51           ` Peter Zijlstra
2019-10-30  9:50         ` Peter Zijlstra
2019-10-30  9:49       ` Peter Zijlstra
2019-10-30 13:41         ` Alexander Shishkin
2019-10-31 11:10         ` Kang, Luwei
2019-11-06  7:44           ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 4/8] KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest Luwei Kang
2019-10-29 14:55   ` Peter Zijlstra
2019-10-30  4:06     ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 5/8] KVM: X86: Expose PDCM cpuid to guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 6/8] KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation Luwei Kang
2019-10-27 23:11 ` [PATCH v1 7/8] KVM: x86: Expose PEBS feature to guest Luwei Kang
2019-10-29 15:05   ` Peter Zijlstra
2019-10-30  4:07     ` Kang, Luwei
2019-10-30  9:52       ` Peter Zijlstra
2019-10-31  4:21         ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 8/8] perf/x86: Add event owner check when PEBS output to Intel PT Luwei Kang
2019-10-29 15:13   ` Peter Zijlstra
2019-10-30  4:07     ` Kang, Luwei
2019-10-30  9:54       ` Peter Zijlstra
2019-10-31  6:55         ` Kang, Luwei
2019-10-31  7:39           ` Alexander Shishkin
2019-10-31 10:31             ` Kang, Luwei

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1572217877-26484-1-git-send-email-luwei.kang@intel.com \
    --to=luwei.kang@intel.com \
    --cc=acme@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=bp@alien8.de \
    --cc=hpa@zytor.com \
    --cc=jmattson@google.com \
    --cc=jolsa@redhat.com \
    --cc=joro@8bytes.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=rkrcmar@redhat.com \
    --cc=sean.j.christopherson@intel.com \
    --cc=tglx@linutronix.de \
    --cc=thomas.lendacky@amd.com \
    --cc=vkuznets@redhat.com \
    --cc=wanpengli@tencent.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.