From: Ajit Pandey <ajitp@codeaurora.org>
To: broonie@kernel.org, plai@codeaurora.org, bgoswami@codeaurora.org,
srinivas.kandagatla@linaro.org
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
linux-kernel@vger.kernel.org, Ajit Pandey <ajitp@codeaurora.org>
Subject: [PATCH v2 6/7] device-tree: bindings: sound: lpass-cpu: Add new compatible soc
Date: Thu, 14 May 2020 22:08:17 +0530 [thread overview]
Message-ID: <1589474298-29437-7-git-send-email-ajitp@codeaurora.org> (raw)
In-Reply-To: <1589474298-29437-1-git-send-email-ajitp@codeaurora.org>
SC7180 soc variants of LPASS uses lpass-cpu node but required few extra
devictree configuration. Update bindings documents with sc7180 compatible
string specific dts properties.
Signed-off-by: Ajit Pandey <ajitp@codeaurora.org>
---
.../devicetree/bindings/sound/qcom,lpass-cpu.yaml | 25 +++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
index f2bcafc..5246d59 100644
--- a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
@@ -21,6 +21,7 @@ properties:
enum:
- qcom,lpass-cpu
- qcom,apq8016-lpass-cpu
+ - qcom,lpass-cpu-sc7180
reg:
items:
@@ -66,6 +67,14 @@ properties:
maxItems: 1
description: Phandle for the audio DSP node
+ iommus:
+ maxItems: 1
+ description: Phandle to apps_smmu node with sid mask
+
+ power-domains:
+ maxItems: 1
+ description: Phandle for power domain node
+
'#sound-dai-cells':
const: 1
@@ -102,6 +111,17 @@ required:
optional:
- qcom,adsp
+if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,lpass-cpu-sc7180
+
+then:
+ required:
+ - iommus
+ - power-domains
+
examples:
lpass@28100000 {
compatible = "qcom,lpass-cpu";
@@ -114,7 +134,10 @@ examples:
"mi2s-bit-clk";
interrupts = <0 85 1>;
- interrupt-names = "lpass-irq-lpaif";
+ interrupt-names = "lpass-irq-lpaif";
+
+ iommus = <&apps_smmu 0x1020 0>;
+ power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
reg = <0x28100000 0x10000>;
reg-names = "lpass-lpaif";
--
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
next prev parent reply other threads:[~2020-05-14 16:44 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <“1586592171-31644-1-git-send-email-ajitp@codeaurora.org”>
2020-05-14 16:38 ` [PATCH v2 0/7] ASoC: QCOM: Add support for SC7180 lpass variant Ajit Pandey
2020-05-14 16:38 ` [PATCH v2 1/7] Documentation: device-tree: sound: Update lpass-cpu driver binding Ajit Pandey
2020-05-14 16:44 ` Mark Brown
2020-05-14 16:38 ` [PATCH v2 2/7] ASoC: qcom: Add common array to initialize soc based core clocks Ajit Pandey
2020-05-14 16:38 ` Ajit Pandey
2020-05-14 16:45 ` Mark Brown
2020-05-14 16:38 ` [PATCH v2 4/7] ASoC: qcom: lpass: Use regmap_field for i2sctl and dmactl registers Ajit Pandey
2020-05-14 16:38 ` [PATCH v2 5/7] include: dt-bindings: sound: Add sc7180-lpass bindings header Ajit Pandey
2020-05-14 16:48 ` Mark Brown
2020-05-14 16:38 ` Ajit Pandey [this message]
2020-05-14 16:38 ` [PATCH v2 7/7] ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio Ajit Pandey
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