Re: [PATCH v6 6/7] clk: mediatek: add UART0 clock support

[Hanks Chen <hanks.chen@mediatek.com>]

On Thu, 2020-06-18 at 17:51 +0200, Matthias Brugger wrote:
> 
> On 18/06/2020 13:33, Hanks Chen wrote:
> > Add MT6779 UART0 clock support.
> > 
> 
> Please a dd fixes tag:
> 
> Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support")

Got it, I'll add it in next version.

> 
> > Signed-off-by: Hanks Chen <hanks.chen@mediatek.com>
> > Signed-off-by: mtk01761 <wendell.lin@mediatek.com>
> 
> Must be a real name not "mtk01761"

Oops, I'll update his name. 

Thank you for your comment.

> 
> > ---
> >  drivers/clk/mediatek/clk-mt6779.c |    2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/drivers/clk/mediatek/clk-mt6779.c b/drivers/clk/mediatek/clk-mt6779.c
> > index 9766ccc..6e0d3a1 100644
> > --- a/drivers/clk/mediatek/clk-mt6779.c
> > +++ b/drivers/clk/mediatek/clk-mt6779.c
> > @@ -919,6 +919,8 @@
> >  		    "pwm_sel", 19),
> >  	GATE_INFRA0(CLK_INFRA_PWM, "infra_pwm",
> >  		    "pwm_sel", 21),
> > +	GATE_INFRA0(CLK_INFRA_UART0, "infra_uart0",
> > +		    "uart_sel", 22),
> >  	GATE_INFRA0(CLK_INFRA_UART1, "infra_uart1",
> >  		    "uart_sel", 23),
> >  	GATE_INFRA0(CLK_INFRA_UART2, "infra_uart2",
> >