[PATCH v2 1/3] Documentation: bindings: add dt documentation for cdn DP controller

[PATCH v2 1/3] Documentation: bindings: add dt documentation for cdn DP controller

[Enric Balletbo i Serra]

From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

This patch adds a binding that describes the cdn DP controller for
rk3399.

Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
---
Changes since v1:
- Add the cdn-dp bindings as requested by Heiko
  - The bindingis were sent already and acked by Rob but for some reason
    never landed. So as these series are related I incorporated this
    patch again [1].

[1] https://patchwork.kernel.org/patch/9278077/

 .../bindings/display/rockchip/cdn-dp-rockchip.txt  | 74 ++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt

diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
new file mode 100644
index 000000000000..d34a56e4f47e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
@@ -0,0 +1,74 @@
+Rockchip RK3399 specific extensions to the cdn Display Port
+================================
+
+Required properties:
+- compatible: must be "rockchip,rk3399-cdn-dp"
+
+- reg: physical base address of the controller and length
+
+- clocks: from common clock binding: handle to dp clock.
+
+- clock-names: from common clock binding:
+	       Required elements: "core-clk" "pclk" "spdif" "grf"
+
+- resets : a list of phandle + reset specifier pairs
+- reset-names : string reset name, must be:
+		"spdif"
+- power-domains : power-domain property defined with a phandle
+		  to respective power domain.
+- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
+- assigned-clock-rates : the DP core clk frequency, shall be: 100000000
+
+- rockchip,grf: this soc should set GRF regs, so need get grf here.
+
+- ports: contain a port nodes with endpoint definitions as defined in
+	 Documentation/devicetree/bindings/media/video-interfaces.txt.
+	 contained 2 endpoints, connecting to the output of vop.
+
+- phys: from general PHY binding: the phandle for the PHY device.
+
+- extcon: extcon specifier for the Power Delivery
+
+- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
+
+-------------------------------------------------------------------------------
+
+Example:
+	cdn_dp: dp@fec00000 {
+		compatible = "rockchip,rk3399-cdn-dp";
+		reg = <0x0 0xfec00000 0x0 0x100000>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
+			 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
+		clock-names = "core-clk", "pclk", "spdif", "grf";
+		assigned-clocks = <&cru SCLK_DP_CORE>;
+		assigned-clock-rates = <100000000>;
+		power-domains = <&power RK3399_PD_HDCP>;
+		phys = <&tcphy0_dp>, <&tcphy1_dp>;
+		resets = <&cru SRST_DPTX_SPDIF_REC>;
+		reset-names = "spdif";
+		extcon = <&fusb0>, <&fusb1>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#sound-dai-cells = <1>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dp_in: port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				dp_in_vopb: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_dp>;
+				};
+
+				dp_in_vopl: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_dp>;
+				};
+			};
+		};
+	};
-- 
2.15.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v2 1/3] Documentation: bindings: add dt documentation for cdn DP controller

[Enric Balletbo i Serra]

From: Chris Zhong <zyw@rock-chips.com>

This patch adds a binding that describes the cdn DP controller for
rk3399.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- Add the cdn-dp bindings as requested by Heiko
  - The bindingis were sent already and acked by Rob but for some reason
    never landed. So as these series are related I incorporated this
    patch again [1].

[1] https://patchwork.kernel.org/patch/9278077/

 .../bindings/display/rockchip/cdn-dp-rockchip.txt  | 74 ++++++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt

diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
new file mode 100644
index 000000000000..d34a56e4f47e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt
@@ -0,0 +1,74 @@
+Rockchip RK3399 specific extensions to the cdn Display Port
+================================
+
+Required properties:
+- compatible: must be "rockchip,rk3399-cdn-dp"
+
+- reg: physical base address of the controller and length
+
+- clocks: from common clock binding: handle to dp clock.
+
+- clock-names: from common clock binding:
+	       Required elements: "core-clk" "pclk" "spdif" "grf"
+
+- resets : a list of phandle + reset specifier pairs
+- reset-names : string reset name, must be:
+		"spdif"
+- power-domains : power-domain property defined with a phandle
+		  to respective power domain.
+- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
+- assigned-clock-rates : the DP core clk frequency, shall be: 100000000
+
+- rockchip,grf: this soc should set GRF regs, so need get grf here.
+
+- ports: contain a port nodes with endpoint definitions as defined in
+	 Documentation/devicetree/bindings/media/video-interfaces.txt.
+	 contained 2 endpoints, connecting to the output of vop.
+
+- phys: from general PHY binding: the phandle for the PHY device.
+
+- extcon: extcon specifier for the Power Delivery
+
+- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
+
+-------------------------------------------------------------------------------
+
+Example:
+	cdn_dp: dp@fec00000 {
+		compatible = "rockchip,rk3399-cdn-dp";
+		reg = <0x0 0xfec00000 0x0 0x100000>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
+			 <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
+		clock-names = "core-clk", "pclk", "spdif", "grf";
+		assigned-clocks = <&cru SCLK_DP_CORE>;
+		assigned-clock-rates = <100000000>;
+		power-domains = <&power RK3399_PD_HDCP>;
+		phys = <&tcphy0_dp>, <&tcphy1_dp>;
+		resets = <&cru SRST_DPTX_SPDIF_REC>;
+		reset-names = "spdif";
+		extcon = <&fusb0>, <&fusb1>;
+		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#sound-dai-cells = <1>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dp_in: port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				dp_in_vopb: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_dp>;
+				};
+
+				dp_in_vopl: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_dp>;
+				};
+			};
+		};
+	};
-- 
2.15.1

[PATCH v2 2/3] arm64: dts: rockchip: add cdn-dp node for rk3399.

[Enric Balletbo i Serra]

From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

Add a node for the cdn DP controller which is embedded in the rk3399
SoC.

Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
---
Changes since v1:
- None

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 50 ++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cdf733e4a450..17a9dc5591c5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -457,6 +457,46 @@
 		};
 	};
 
+        cdn_dp: dp@fec00000 {
+                compatible = "rockchip,rk3399-cdn-dp";
+                reg = <0x0 0xfec00000 0x0 0x100000>;
+                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
+                         <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
+                clock-names = "core-clk", "pclk", "spdif", "grf";
+                assigned-clocks = <&cru SCLK_DP_CORE>;
+                assigned-clock-rates = <100000000>;
+                power-domains = <&power RK3399_PD_HDCP>;
+                phys = <&tcphy0_dp>, <&tcphy1_dp>;
+                resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
+                         <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
+                reset-names = "spdif", "dptx", "apb", "core";
+                rockchip,grf = <&grf>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                #sound-dai-cells = <1>;
+                status = "disabled";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        dp_in: port {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                dp_in_vopb: endpoint@0 {
+                                        reg = <0>;
+                                        remote-endpoint = <&vopb_out_dp>;
+                                };
+
+                                dp_in_vopl: endpoint@1 {
+                                        reg = <1>;
+                                        remote-endpoint = <&vopl_out_dp>;
+                                };
+                        };
+                };
+        };
+
 	gic: interrupt-controller@fee00000 {
 		compatible = "arm,gic-v3";
 		#interrupt-cells = <4>;
@@ -1553,6 +1593,11 @@
 				reg = <3>;
 				remote-endpoint = <&mipi1_in_vopl>;
 			};
+
+                        vopl_out_dp: endpoint@4 {
+                                reg = <4>;
+                                remote-endpoint = <&dp_in_vopl>;
+                        };
 		};
 	};
 
@@ -1605,6 +1650,11 @@
 				reg = <3>;
 				remote-endpoint = <&mipi1_in_vopb>;
 			};
+
+                        vopb_out_dp: endpoint@4 {
+                                reg = <4>;
+                                remote-endpoint = <&dp_in_vopb>;
+                        };
 		};
 	};
 
-- 
2.15.1

[PATCH v2 2/3] arm64: dts: rockchip: add cdn-dp node for rk3399.

[Enric Balletbo i Serra]

From: Chris Zhong <zyw@rock-chips.com>

Add a node for the cdn DP controller which is embedded in the rk3399
SoC.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- None

 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 50 ++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index cdf733e4a450..17a9dc5591c5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -457,6 +457,46 @@
 		};
 	};
 
+        cdn_dp: dp@fec00000 {
+                compatible = "rockchip,rk3399-cdn-dp";
+                reg = <0x0 0xfec00000 0x0 0x100000>;
+                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
+                         <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
+                clock-names = "core-clk", "pclk", "spdif", "grf";
+                assigned-clocks = <&cru SCLK_DP_CORE>;
+                assigned-clock-rates = <100000000>;
+                power-domains = <&power RK3399_PD_HDCP>;
+                phys = <&tcphy0_dp>, <&tcphy1_dp>;
+                resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
+                         <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
+                reset-names = "spdif", "dptx", "apb", "core";
+                rockchip,grf = <&grf>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                #sound-dai-cells = <1>;
+                status = "disabled";
+
+                ports {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        dp_in: port {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                dp_in_vopb: endpoint@0 {
+                                        reg = <0>;
+                                        remote-endpoint = <&vopb_out_dp>;
+                                };
+
+                                dp_in_vopl: endpoint@1 {
+                                        reg = <1>;
+                                        remote-endpoint = <&vopl_out_dp>;
+                                };
+                        };
+                };
+        };
+
 	gic: interrupt-controller@fee00000 {
 		compatible = "arm,gic-v3";
 		#interrupt-cells = <4>;
@@ -1553,6 +1593,11 @@
 				reg = <3>;
 				remote-endpoint = <&mipi1_in_vopl>;
 			};
+
+                        vopl_out_dp: endpoint@4 {
+                                reg = <4>;
+                                remote-endpoint = <&dp_in_vopl>;
+                        };
 		};
 	};
 
@@ -1605,6 +1650,11 @@
 				reg = <3>;
 				remote-endpoint = <&mipi1_in_vopb>;
 			};
+
+                        vopb_out_dp: endpoint@4 {
+                                reg = <4>;
+                                remote-endpoint = <&dp_in_vopb>;
+                        };
 		};
 	};
 
-- 
2.15.1

Re: [PATCH v2 2/3] arm64: dts: rockchip: add cdn-dp node for rk3399.

[Heiko Stübner]

Am Dienstag, 13. Februar 2018, 15:35:48 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> 
> Add a node for the cdn DP controller which is embedded in the rk3399
> SoC.
> 
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>

applied for 4.17 after some fixups:

- the patch used whitespaces instead of tabs for indentation
- address+size-cells are only necessary above the endpoint nodes
  (see the hdmi node for example)
- the interrupts property had the wrong number of elements
  dtc should have warned about that


Heiko
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 2/3] arm64: dts: rockchip: add cdn-dp node for rk3399.

[Heiko Stübner]

Am Dienstag, 13. Februar 2018, 15:35:48 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw@rock-chips.com>
> 
> Add a node for the cdn DP controller which is embedded in the rk3399
> SoC.
> 
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>

applied for 4.17 after some fixups:

- the patch used whitespaces instead of tabs for indentation
- address+size-cells are only necessary above the endpoint nodes
  (see the hdmi node for example)
- the interrupts property had the wrong number of elements
  dtc should have warned about that


Heiko

[PATCH v2 3/3] arm64: dts: rockchip: enable DP for gru.

[Enric Balletbo i Serra]

From: Chris Zhong <zyw@rock-chips.com>

Enable cdn_dp and create a cdn-dp-sound for the DP audio. Delete the
endpoints between dp and vopL for gru, since we want the DP only use
VOP big, which can support 4K mode.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- None

 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 03f195025390..d05e8a52ec3c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -515,7 +515,23 @@
 		compatible = "rockchip,rk3399-gru-sound";
 		rockchip,cpu = <&i2s0 &i2s2>;
 		rockchip,codec = <&max98357a &headsetcodec
-				  &codec &wacky_spi_audio>;
+				  &codec &wacky_spi_audio &cdn_dp>;
+	};
+};
+
+/* Don't use vopl for dp, save it for edp */
+/delete-node/ &vopl_out_dp;
+/delete-node/ &dp_in_vopl;
+
+&cdn_dp {
+	status = "okay";
+	extcon = <&usbc_extcon0>, <&usbc_extcon1>;
+
+	ports {
+		/* Don't use vopl for dp, save it for edp */
+		dp_in: port {
+			/delete-node/ endpoint@1;
+		};
 	};
 };
 
-- 
2.15.1

Re: [PATCH v2 3/3] arm64: dts: rockchip: enable DP for gru.

[Heiko Stübner]

Am Dienstag, 13. Februar 2018, 15:35:49 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> 
> Enable cdn_dp and create a cdn-dp-sound for the DP audio. Delete the
> endpoints between dp and vopL for gru, since we want the DP only use
> VOP big, which can support 4K mode.
> 
> Signed-off-by: Chris Zhong <zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>


applied for 4.17 after dropping the vop-related hacks

The devicetree should only describe the hardware and is generally not meant
to do configuration-related things. Selecting the most suitable vops for any
given combination of outputs should be in the realm of the driver and not
hard-coded in the dt.


Heiko
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 3/3] arm64: dts: rockchip: enable DP for gru.

[Heiko Stübner]

Am Dienstag, 13. Februar 2018, 15:35:49 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw@rock-chips.com>
> 
> Enable cdn_dp and create a cdn-dp-sound for the DP audio. Delete the
> endpoints between dp and vopL for gru, since we want the DP only use
> VOP big, which can support 4K mode.
> 
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>


applied for 4.17 after dropping the vop-related hacks

The devicetree should only describe the hardware and is generally not meant
to do configuration-related things. Selecting the most suitable vops for any
given combination of outputs should be in the realm of the driver and not
hard-coded in the dt.


Heiko

Re: [PATCH v2 1/3] Documentation: bindings: add dt documentation for cdn DP controller

[Heiko Stübner]

Am Dienstag, 13. Februar 2018, 15:35:47 CET schrieb Enric Balletbo i Serra:
> From: Chris Zhong <zyw@rock-chips.com>
> 
> This patch adds a binding that describes the cdn DP controller for
> rk3399.
> 
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> Changes since v1:
> - Add the cdn-dp bindings as requested by Heiko
>   - The bindingis were sent already and acked by Rob but for some reason
>     never landed. So as these series are related I incorporated this
>     patch again [1].
> 
> [1] https://patchwork.kernel.org/patch/9278077/

applied for 4.17 (into drm-misc).

The driver uses 3 additional resets now, which I just added to the
reset-names.


Heiko