[PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control

[PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

Hi,

This patch series try to fix two things.
- 3byte read logic bug
- Use regcache and pm_runtime to optimize 'PWDN' control

ChiYuan Huang (2):
  ASoC: rt9120: Fix 3byte read, valule offset typo
  ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic

 sound/soc/codecs/rt9120.c | 113 +++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 106 insertions(+), 7 deletions(-)

-- 
2.7.4

[PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

Hi,

This patch series try to fix two things.
- 3byte read logic bug
- Use regcache and pm_runtime to optimize 'PWDN' control

ChiYuan Huang (2):
  ASoC: rt9120: Fix 3byte read, valule offset typo
  ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic

 sound/soc/codecs/rt9120.c | 113 +++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 106 insertions(+), 7 deletions(-)

-- 
2.7.4

[PATCH 1/2] ASoC: rt9120: Fix 3byte read, valule offset typo

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

For RG 3byte read, the value order is  offset [0], [1], and [2].

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
---
 sound/soc/codecs/rt9120.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rt9120.c b/sound/soc/codecs/rt9120.c
index cdf8ad2..94d42be 100644
--- a/sound/soc/codecs/rt9120.c
+++ b/sound/soc/codecs/rt9120.c
@@ -372,7 +372,7 @@ static int rt9120_reg_read(void *context, unsigned int reg, unsigned int *val)
 		*val = be32_to_cpup((__be32 *)raw);
 		break;
 	case 3:
-		*val = raw[0] << 16 | raw[1] << 8 | raw[0];
+		*val = raw[0] << 16 | raw[1] << 8 | raw[2];
 		break;
 	case 2:
 		*val = be16_to_cpup((__be16 *)raw);
-- 
2.7.4

[PATCH 1/2] ASoC: rt9120: Fix 3byte read, valule offset typo

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

For RG 3byte read, the value order is  offset [0], [1], and [2].

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
---
 sound/soc/codecs/rt9120.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/codecs/rt9120.c b/sound/soc/codecs/rt9120.c
index cdf8ad2..94d42be 100644
--- a/sound/soc/codecs/rt9120.c
+++ b/sound/soc/codecs/rt9120.c
@@ -372,7 +372,7 @@ static int rt9120_reg_read(void *context, unsigned int reg, unsigned int *val)
 		*val = be32_to_cpup((__be32 *)raw);
 		break;
 	case 3:
-		*val = raw[0] << 16 | raw[1] << 8 | raw[0];
+		*val = raw[0] << 16 | raw[1] << 8 | raw[2];
 		break;
 	case 2:
 		*val = be16_to_cpup((__be16 *)raw);
-- 
2.7.4

[PATCH 2/2] ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

From the datasheet, the only way to meet the lowest power consumption is
to pull low the 'pwdnn' gpio. But if it is low, IC will keep in
reset state, all registers reset to default.

And the power consumption is listed below
1. amp off and 'pwdnn' high => idle state, PVDD = 1mA, DVDD = 7mA
2. amp off and 'pwdnn' low  => shutdown state, PVDD < 20uA, DVDD < 15uA

It's the large difference for the consumption current

This fix is to use pm_runtime and regcache to handle 'pwdnn' gpio
control.

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
---
 sound/soc/codecs/rt9120.c | 111 +++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 105 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/rt9120.c b/sound/soc/codecs/rt9120.c
index 94d42be..da495bd 100644
--- a/sound/soc/codecs/rt9120.c
+++ b/sound/soc/codecs/rt9120.c
@@ -7,6 +7,7 @@
 #include <linux/i2c.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
 #include <sound/pcm.h>
@@ -75,6 +76,7 @@ enum {
 struct rt9120_data {
 	struct device *dev;
 	struct regmap *regmap;
+	struct gpio_desc *pwdnn_gpio;
 	int chip_idx;
 };
 
@@ -160,6 +162,8 @@ static int rt9120_codec_probe(struct snd_soc_component *comp)
 
 	snd_soc_component_init_regmap(comp, data->regmap);
 
+	pm_runtime_get_sync(comp->dev);
+
 	/* Internal setting */
 	if (data->chip_idx == CHIP_IDX_RT9120S) {
 		snd_soc_component_write(comp, RT9120_REG_INTERCFG, 0xde);
@@ -167,6 +171,9 @@ static int rt9120_codec_probe(struct snd_soc_component *comp)
 	} else
 		snd_soc_component_write(comp, RT9120_REG_INTERNAL0, 0x04);
 
+	pm_runtime_mark_last_busy(comp->dev);
+	pm_runtime_put(comp->dev);
+
 	return 0;
 }
 
@@ -338,6 +345,18 @@ static const struct regmap_access_table rt9120_wr_table = {
 	.n_yes_ranges = ARRAY_SIZE(rt9120_wr_yes_ranges),
 };
 
+static bool rt9120_volatile_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case 0x00 ... 0x01:
+	case 0x10:
+	case 0x30 ... 0x40:
+		return true;
+	default:
+		return false;
+	}
+}
+
 static int rt9120_get_reg_size(unsigned int reg)
 {
 	switch (reg) {
@@ -397,14 +416,49 @@ static int rt9120_reg_write(void *context, unsigned int reg, unsigned int val)
 	return i2c_smbus_write_i2c_block_data(i2c, reg, size, rawp + offs);
 }
 
+static const struct reg_default rt9120_reg_defaults[] = {
+	{ .reg = 0x02, .def = 0x02 },
+	{ .reg = 0x03, .def = 0xf2 },
+	{ .reg = 0x04, .def = 0x01 },
+	{ .reg = 0x05, .def = 0xc0 },
+	{ .reg = 0x06, .def = 0x28 },
+	{ .reg = 0x07, .def = 0x04 },
+	{ .reg = 0x08, .def = 0xff },
+	{ .reg = 0x09, .def = 0x01 },
+	{ .reg = 0x0a, .def = 0x01 },
+	{ .reg = 0x0b, .def = 0x00 },
+	{ .reg = 0x0c, .def = 0x04 },
+	{ .reg = 0x11, .def = 0x30 },
+	{ .reg = 0x12, .def = 0x08 },
+	{ .reg = 0x13, .def = 0x12 },
+	{ .reg = 0x14, .def = 0x09 },
+	{ .reg = 0x15, .def = 0x00 },
+	{ .reg = 0x20, .def = 0x7ff },
+	{ .reg = 0x21, .def = 0x180 },
+	{ .reg = 0x22, .def = 0x180 },
+	{ .reg = 0x23, .def = 0x00 },
+	{ .reg = 0x24, .def = 0x80 },
+	{ .reg = 0x25, .def = 0x180 },
+	{ .reg = 0x26, .def = 0x640 },
+	{ .reg = 0x27, .def = 0x180 },
+	{ .reg = 0x63, .def = 0x5e },
+	{ .reg = 0x65, .def = 0x66 },
+	{ .reg = 0x6c, .def = 0xe0 },
+	{ .reg = 0xf8, .def = 0x44 },
+};
+
 static const struct regmap_config rt9120_regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 32,
 	.max_register = RT9120_REG_DIGCFG,
+	.reg_defaults = rt9120_reg_defaults,
+	.num_reg_defaults = ARRAY_SIZE(rt9120_reg_defaults),
+	.cache_type = REGCACHE_RBTREE,
 
 	.reg_read = rt9120_reg_read,
 	.reg_write = rt9120_reg_write,
 
+	.volatile_reg = rt9120_volatile_reg,
 	.wr_table = &rt9120_wr_table,
 	.rd_table = &rt9120_rd_table,
 };
@@ -450,7 +504,6 @@ static int rt9120_do_register_reset(struct rt9120_data *data)
 static int rt9120_probe(struct i2c_client *i2c)
 {
 	struct rt9120_data *data;
-	struct gpio_desc *pwdnn_gpio;
 	struct regulator *dvdd_supply;
 	int dvdd_supply_volt, ret;
 
@@ -461,12 +514,12 @@ static int rt9120_probe(struct i2c_client *i2c)
 	data->dev = &i2c->dev;
 	i2c_set_clientdata(i2c, data);
 
-	pwdnn_gpio = devm_gpiod_get_optional(&i2c->dev, "pwdnn",
-					     GPIOD_OUT_HIGH);
-	if (IS_ERR(pwdnn_gpio)) {
+	data->pwdnn_gpio = devm_gpiod_get_optional(&i2c->dev, "pwdnn",
+						   GPIOD_OUT_HIGH);
+	if (IS_ERR(data->pwdnn_gpio)) {
 		dev_err(&i2c->dev, "Failed to initialize 'pwdnn' gpio\n");
-		return PTR_ERR(pwdnn_gpio);
-	} else if (pwdnn_gpio) {
+		return PTR_ERR(data->pwdnn_gpio);
+	} else if (data->pwdnn_gpio) {
 		dev_dbg(&i2c->dev, "'pwdnn' from low to high, wait chip on\n");
 		msleep(RT9120_CHIPON_WAITMS);
 	}
@@ -508,11 +561,55 @@ static int rt9120_probe(struct i2c_client *i2c)
 		}
 	}
 
+	pm_runtime_set_autosuspend_delay(&i2c->dev, 1000);
+	pm_runtime_use_autosuspend(&i2c->dev);
+	pm_runtime_set_active(&i2c->dev);
+	pm_runtime_mark_last_busy(&i2c->dev);
+	pm_runtime_enable(&i2c->dev);
+
 	return devm_snd_soc_register_component(&i2c->dev,
 					       &rt9120_component_driver,
 					       &rt9120_dai, 1);
 }
 
+static int rt9120_remove(struct i2c_client *i2c)
+{
+	pm_runtime_disable(&i2c->dev);
+	pm_runtime_set_suspended(&i2c->dev);
+	return 0;
+}
+
+static int __maybe_unused rt9120_runtime_suspend(struct device *dev)
+{
+	struct rt9120_data *data = dev_get_drvdata(dev);
+
+	if (data->pwdnn_gpio) {
+		regcache_cache_only(data->regmap, true);
+		regcache_mark_dirty(data->regmap);
+		gpiod_set_value(data->pwdnn_gpio, 0);
+	}
+
+	return 0;
+}
+
+static int __maybe_unused rt9120_runtime_resume(struct device *dev)
+{
+	struct rt9120_data *data = dev_get_drvdata(dev);
+
+	if (data->pwdnn_gpio) {
+		gpiod_set_value(data->pwdnn_gpio, 1);
+		msleep(RT9120_CHIPON_WAITMS);
+		regcache_cache_only(data->regmap, false);
+		regcache_sync(data->regmap);
+	}
+
+	return 0;
+}
+
+static const struct dev_pm_ops rt9120_pm_ops = {
+	SET_RUNTIME_PM_OPS(rt9120_runtime_suspend, rt9120_runtime_resume, NULL)
+};
+
 static const struct of_device_id __maybe_unused rt9120_device_table[] = {
 	{ .compatible = "richtek,rt9120", },
 	{ }
@@ -523,8 +620,10 @@ static struct i2c_driver rt9120_driver = {
 	.driver = {
 		.name = "rt9120",
 		.of_match_table = rt9120_device_table,
+		.pm = &rt9120_pm_ops,
 	},
 	.probe_new = rt9120_probe,
+	.remove = rt9120_remove,
 };
 module_i2c_driver(rt9120_driver);
 
-- 
2.7.4

[PATCH 2/2] ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic

[cy_huang]

From: ChiYuan Huang <cy_huang@richtek.com>

From the datasheet, the only way to meet the lowest power consumption is
to pull low the 'pwdnn' gpio. But if it is low, IC will keep in
reset state, all registers reset to default.

And the power consumption is listed below
1. amp off and 'pwdnn' high => idle state, PVDD = 1mA, DVDD = 7mA
2. amp off and 'pwdnn' low  => shutdown state, PVDD < 20uA, DVDD < 15uA

It's the large difference for the consumption current

This fix is to use pm_runtime and regcache to handle 'pwdnn' gpio
control.

Signed-off-by: ChiYuan Huang <cy_huang@richtek.com>
---
 sound/soc/codecs/rt9120.c | 111 +++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 105 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/rt9120.c b/sound/soc/codecs/rt9120.c
index 94d42be..da495bd 100644
--- a/sound/soc/codecs/rt9120.c
+++ b/sound/soc/codecs/rt9120.c
@@ -7,6 +7,7 @@
 #include <linux/i2c.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
 #include <sound/pcm.h>
@@ -75,6 +76,7 @@ enum {
 struct rt9120_data {
 	struct device *dev;
 	struct regmap *regmap;
+	struct gpio_desc *pwdnn_gpio;
 	int chip_idx;
 };
 
@@ -160,6 +162,8 @@ static int rt9120_codec_probe(struct snd_soc_component *comp)
 
 	snd_soc_component_init_regmap(comp, data->regmap);
 
+	pm_runtime_get_sync(comp->dev);
+
 	/* Internal setting */
 	if (data->chip_idx == CHIP_IDX_RT9120S) {
 		snd_soc_component_write(comp, RT9120_REG_INTERCFG, 0xde);
@@ -167,6 +171,9 @@ static int rt9120_codec_probe(struct snd_soc_component *comp)
 	} else
 		snd_soc_component_write(comp, RT9120_REG_INTERNAL0, 0x04);
 
+	pm_runtime_mark_last_busy(comp->dev);
+	pm_runtime_put(comp->dev);
+
 	return 0;
 }
 
@@ -338,6 +345,18 @@ static const struct regmap_access_table rt9120_wr_table = {
 	.n_yes_ranges = ARRAY_SIZE(rt9120_wr_yes_ranges),
 };
 
+static bool rt9120_volatile_reg(struct device *dev, unsigned int reg)
+{
+	switch (reg) {
+	case 0x00 ... 0x01:
+	case 0x10:
+	case 0x30 ... 0x40:
+		return true;
+	default:
+		return false;
+	}
+}
+
 static int rt9120_get_reg_size(unsigned int reg)
 {
 	switch (reg) {
@@ -397,14 +416,49 @@ static int rt9120_reg_write(void *context, unsigned int reg, unsigned int val)
 	return i2c_smbus_write_i2c_block_data(i2c, reg, size, rawp + offs);
 }
 
+static const struct reg_default rt9120_reg_defaults[] = {
+	{ .reg = 0x02, .def = 0x02 },
+	{ .reg = 0x03, .def = 0xf2 },
+	{ .reg = 0x04, .def = 0x01 },
+	{ .reg = 0x05, .def = 0xc0 },
+	{ .reg = 0x06, .def = 0x28 },
+	{ .reg = 0x07, .def = 0x04 },
+	{ .reg = 0x08, .def = 0xff },
+	{ .reg = 0x09, .def = 0x01 },
+	{ .reg = 0x0a, .def = 0x01 },
+	{ .reg = 0x0b, .def = 0x00 },
+	{ .reg = 0x0c, .def = 0x04 },
+	{ .reg = 0x11, .def = 0x30 },
+	{ .reg = 0x12, .def = 0x08 },
+	{ .reg = 0x13, .def = 0x12 },
+	{ .reg = 0x14, .def = 0x09 },
+	{ .reg = 0x15, .def = 0x00 },
+	{ .reg = 0x20, .def = 0x7ff },
+	{ .reg = 0x21, .def = 0x180 },
+	{ .reg = 0x22, .def = 0x180 },
+	{ .reg = 0x23, .def = 0x00 },
+	{ .reg = 0x24, .def = 0x80 },
+	{ .reg = 0x25, .def = 0x180 },
+	{ .reg = 0x26, .def = 0x640 },
+	{ .reg = 0x27, .def = 0x180 },
+	{ .reg = 0x63, .def = 0x5e },
+	{ .reg = 0x65, .def = 0x66 },
+	{ .reg = 0x6c, .def = 0xe0 },
+	{ .reg = 0xf8, .def = 0x44 },
+};
+
 static const struct regmap_config rt9120_regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 32,
 	.max_register = RT9120_REG_DIGCFG,
+	.reg_defaults = rt9120_reg_defaults,
+	.num_reg_defaults = ARRAY_SIZE(rt9120_reg_defaults),
+	.cache_type = REGCACHE_RBTREE,
 
 	.reg_read = rt9120_reg_read,
 	.reg_write = rt9120_reg_write,
 
+	.volatile_reg = rt9120_volatile_reg,
 	.wr_table = &rt9120_wr_table,
 	.rd_table = &rt9120_rd_table,
 };
@@ -450,7 +504,6 @@ static int rt9120_do_register_reset(struct rt9120_data *data)
 static int rt9120_probe(struct i2c_client *i2c)
 {
 	struct rt9120_data *data;
-	struct gpio_desc *pwdnn_gpio;
 	struct regulator *dvdd_supply;
 	int dvdd_supply_volt, ret;
 
@@ -461,12 +514,12 @@ static int rt9120_probe(struct i2c_client *i2c)
 	data->dev = &i2c->dev;
 	i2c_set_clientdata(i2c, data);
 
-	pwdnn_gpio = devm_gpiod_get_optional(&i2c->dev, "pwdnn",
-					     GPIOD_OUT_HIGH);
-	if (IS_ERR(pwdnn_gpio)) {
+	data->pwdnn_gpio = devm_gpiod_get_optional(&i2c->dev, "pwdnn",
+						   GPIOD_OUT_HIGH);
+	if (IS_ERR(data->pwdnn_gpio)) {
 		dev_err(&i2c->dev, "Failed to initialize 'pwdnn' gpio\n");
-		return PTR_ERR(pwdnn_gpio);
-	} else if (pwdnn_gpio) {
+		return PTR_ERR(data->pwdnn_gpio);
+	} else if (data->pwdnn_gpio) {
 		dev_dbg(&i2c->dev, "'pwdnn' from low to high, wait chip on\n");
 		msleep(RT9120_CHIPON_WAITMS);
 	}
@@ -508,11 +561,55 @@ static int rt9120_probe(struct i2c_client *i2c)
 		}
 	}
 
+	pm_runtime_set_autosuspend_delay(&i2c->dev, 1000);
+	pm_runtime_use_autosuspend(&i2c->dev);
+	pm_runtime_set_active(&i2c->dev);
+	pm_runtime_mark_last_busy(&i2c->dev);
+	pm_runtime_enable(&i2c->dev);
+
 	return devm_snd_soc_register_component(&i2c->dev,
 					       &rt9120_component_driver,
 					       &rt9120_dai, 1);
 }
 
+static int rt9120_remove(struct i2c_client *i2c)
+{
+	pm_runtime_disable(&i2c->dev);
+	pm_runtime_set_suspended(&i2c->dev);
+	return 0;
+}
+
+static int __maybe_unused rt9120_runtime_suspend(struct device *dev)
+{
+	struct rt9120_data *data = dev_get_drvdata(dev);
+
+	if (data->pwdnn_gpio) {
+		regcache_cache_only(data->regmap, true);
+		regcache_mark_dirty(data->regmap);
+		gpiod_set_value(data->pwdnn_gpio, 0);
+	}
+
+	return 0;
+}
+
+static int __maybe_unused rt9120_runtime_resume(struct device *dev)
+{
+	struct rt9120_data *data = dev_get_drvdata(dev);
+
+	if (data->pwdnn_gpio) {
+		gpiod_set_value(data->pwdnn_gpio, 1);
+		msleep(RT9120_CHIPON_WAITMS);
+		regcache_cache_only(data->regmap, false);
+		regcache_sync(data->regmap);
+	}
+
+	return 0;
+}
+
+static const struct dev_pm_ops rt9120_pm_ops = {
+	SET_RUNTIME_PM_OPS(rt9120_runtime_suspend, rt9120_runtime_resume, NULL)
+};
+
 static const struct of_device_id __maybe_unused rt9120_device_table[] = {
 	{ .compatible = "richtek,rt9120", },
 	{ }
@@ -523,8 +620,10 @@ static struct i2c_driver rt9120_driver = {
 	.driver = {
 		.name = "rt9120",
 		.of_match_table = rt9120_device_table,
+		.pm = &rt9120_pm_ops,
 	},
 	.probe_new = rt9120_probe,
+	.remove = rt9120_remove,
 };
 module_i2c_driver(rt9120_driver);
 
-- 
2.7.4

Re: [PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control

[Mark Brown]

On Thu, 19 May 2022 10:13:36 +0800, cy_huang wrote:
> From: ChiYuan Huang <cy_huang@richtek.com>
> 
> Hi,
> 
> This patch series try to fix two things.
> - 3byte read logic bug
> - Use regcache and pm_runtime to optimize 'PWDN' control
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/2] ASoC: rt9120: Fix 3byte read, valule offset typo
      commit: 57f68f2168988e574133fb5abcd73949bf1d1df2
[2/2] ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic
      commit: 80b949f332e331b67c3ae4f323daf2cb91e743e5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

Re: [PATCH 0/2] ASoC: rt9120: Fix 3byte read logic and optimize 'PWDN' control

[Mark Brown]

On Thu, 19 May 2022 10:13:36 +0800, cy_huang wrote:
> From: ChiYuan Huang <cy_huang@richtek.com>
> 
> Hi,
> 
> This patch series try to fix two things.
> - 3byte read logic bug
> - Use regcache and pm_runtime to optimize 'PWDN' control
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/2] ASoC: rt9120: Fix 3byte read, valule offset typo
      commit: 57f68f2168988e574133fb5abcd73949bf1d1df2
[2/2] ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic
      commit: 80b949f332e331b67c3ae4f323daf2cb91e743e5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark