From: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH] ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
Date: Mon, 24 Sep 2018 16:05:49 +0200 [thread overview]
Message-ID: <1680177.p9B9Bbjx8F@phil> (raw)
In-Reply-To: <20180921081341.23258-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
Am Freitag, 21. September 2018, 10:13:41 CEST schrieb Heiko Stuebner:
> It is good practice to make the setting of gpio-pinctrls explicitly in the
> devicetree, and in this case even necessary.
> Rockchip boards start with iomux settings set to gpio for most pins and
> while the linux pinctrl driver also implicitly sets the gpio function if
> a pin is requested as gpio that is not necessarily true for other drivers.
>
> The issue in question stems from uboot, where the sdmmc_pwr pin is set
> to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
> loader. The regulator controlled by the pin is active-low though, so
> when the dwmmc hw-block sets its enabled bit, it actually disables the
> regulator. By changing the pin back to gpio we fix that behaviour.
>
> Signed-off-by: Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
applied for 4.20
WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
Date: Mon, 24 Sep 2018 16:05:49 +0200 [thread overview]
Message-ID: <1680177.p9B9Bbjx8F@phil> (raw)
In-Reply-To: <20180921081341.23258-1-heiko@sntech.de>
Am Freitag, 21. September 2018, 10:13:41 CEST schrieb Heiko Stuebner:
> It is good practice to make the setting of gpio-pinctrls explicitly in the
> devicetree, and in this case even necessary.
> Rockchip boards start with iomux settings set to gpio for most pins and
> while the linux pinctrl driver also implicitly sets the gpio function if
> a pin is requested as gpio that is not necessarily true for other drivers.
>
> The issue in question stems from uboot, where the sdmmc_pwr pin is set
> to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
> loader. The regulator controlled by the pin is active-low though, so
> when the dwmmc hw-block sets its enabled bit, it actually disables the
> regulator. By changing the pin back to gpio we fix that behaviour.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
applied for 4.20
next prev parent reply other threads:[~2018-09-24 14:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 8:13 [PATCH] ARM: dts: rockchip: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock Heiko Stuebner
2018-09-21 8:13 ` Heiko Stuebner
[not found] ` <20180921081341.23258-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-09-24 14:05 ` Heiko Stuebner [this message]
2018-09-24 14:05 ` Heiko Stuebner
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