From: patchwork-bot+linux-riscv@kernel.org
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, conor@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, jszhang@kernel.org,
wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org,
samuel.holland@sifive.com, corbet@lwn.net, shuah@kernel.org,
guoren@kernel.org, evan@rivosinc.com, jrtc27@jrtc27.com,
ajones@ventanamicro.com, cyy@cyyself.name, andybnac@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org, conor.dooley@microchip.com,
heiko@sntech.de
Subject: Re: [PATCH v11 00/14] riscv: Add support for xtheadvector
Date: Thu, 30 Jan 2025 14:10:38 +0000 [thread overview]
Message-ID: <173824623824.971083.4395426797923401446.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241113-xtheadvector-v11-0-236c22791ef9@rivosinc.com>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Wed, 13 Nov 2024 18:21:06 -0800 you wrote:
> xtheadvector is a custom extension that is based upon riscv vector
> version 0.7.1 [1]. All of the vector routines have been modified to
> support this alternative vector version based upon whether xtheadvector
> was determined to be supported at boot.
>
> vlenb is not supported on the existing xtheadvector hardware, so a
> devicetree property thead,vlenb is added to provide the vlenb to Linux.
>
> [...]
Here is the summary with links:
- [v11,01/14] dt-bindings: riscv: Add xtheadvector ISA extension description
https://git.kernel.org/riscv/c/e576b7cb8183
- [v11,02/14] dt-bindings: cpus: add a thead vlen register length property
https://git.kernel.org/riscv/c/bf6279b38a4b
- [v11,03/14] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree
https://git.kernel.org/riscv/c/ce1daeeba600
- [v11,04/14] riscv: Add thead and xtheadvector as a vendor extension
https://git.kernel.org/riscv/c/cddd63869f92
- [v11,05/14] riscv: vector: Use vlenb from DT for thead
https://git.kernel.org/riscv/c/377be47f90e4
- [v11,06/14] RISC-V: define the elements of the VCSR vector CSR
https://git.kernel.org/riscv/c/66f197785d51
- [v11,07/14] riscv: csr: Add CSR encodings for CSR_VXRM/CSR_VXSAT
https://git.kernel.org/riscv/c/b9a931442451
- [v11,08/14] riscv: Add xtheadvector instruction definitions
https://git.kernel.org/riscv/c/01e3313e34d0
- [v11,09/14] riscv: vector: Support xtheadvector save/restore
https://git.kernel.org/riscv/c/d863910eabaf
- [v11,10/14] riscv: hwprobe: Add thead vendor extension probing
https://git.kernel.org/riscv/c/a5ea53da65c5
- [v11,11/14] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension
https://git.kernel.org/riscv/c/7fa00fd6ff53
- [v11,12/14] selftests: riscv: Fix vector tests
https://git.kernel.org/riscv/c/57d7713af93e
- [v11,13/14] selftests: riscv: Support xtheadvector in vector tests
https://git.kernel.org/riscv/c/c384c5d4a2ae
- [v11,14/14] riscv: Add ghostwrite vulnerability
https://git.kernel.org/riscv/c/4bf97069239b
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
WARNING: multiple messages have this Message-ID (diff)
From: patchwork-bot+linux-riscv@kernel.org
To: Charlie Jenkins <charlie@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, conor@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, jszhang@kernel.org,
wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org,
samuel.holland@sifive.com, corbet@lwn.net, shuah@kernel.org,
guoren@kernel.org, evan@rivosinc.com, jrtc27@jrtc27.com,
ajones@ventanamicro.com, cyy@cyyself.name, andybnac@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org, conor.dooley@microchip.com,
heiko@sntech.de
Subject: Re: [PATCH v11 00/14] riscv: Add support for xtheadvector
Date: Thu, 30 Jan 2025 14:10:38 +0000 [thread overview]
Message-ID: <173824623824.971083.4395426797923401446.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20241113-xtheadvector-v11-0-236c22791ef9@rivosinc.com>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Wed, 13 Nov 2024 18:21:06 -0800 you wrote:
> xtheadvector is a custom extension that is based upon riscv vector
> version 0.7.1 [1]. All of the vector routines have been modified to
> support this alternative vector version based upon whether xtheadvector
> was determined to be supported at boot.
>
> vlenb is not supported on the existing xtheadvector hardware, so a
> devicetree property thead,vlenb is added to provide the vlenb to Linux.
>
> [...]
Here is the summary with links:
- [v11,01/14] dt-bindings: riscv: Add xtheadvector ISA extension description
https://git.kernel.org/riscv/c/e576b7cb8183
- [v11,02/14] dt-bindings: cpus: add a thead vlen register length property
https://git.kernel.org/riscv/c/bf6279b38a4b
- [v11,03/14] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree
https://git.kernel.org/riscv/c/ce1daeeba600
- [v11,04/14] riscv: Add thead and xtheadvector as a vendor extension
https://git.kernel.org/riscv/c/cddd63869f92
- [v11,05/14] riscv: vector: Use vlenb from DT for thead
https://git.kernel.org/riscv/c/377be47f90e4
- [v11,06/14] RISC-V: define the elements of the VCSR vector CSR
https://git.kernel.org/riscv/c/66f197785d51
- [v11,07/14] riscv: csr: Add CSR encodings for CSR_VXRM/CSR_VXSAT
https://git.kernel.org/riscv/c/b9a931442451
- [v11,08/14] riscv: Add xtheadvector instruction definitions
https://git.kernel.org/riscv/c/01e3313e34d0
- [v11,09/14] riscv: vector: Support xtheadvector save/restore
https://git.kernel.org/riscv/c/d863910eabaf
- [v11,10/14] riscv: hwprobe: Add thead vendor extension probing
https://git.kernel.org/riscv/c/a5ea53da65c5
- [v11,11/14] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension
https://git.kernel.org/riscv/c/7fa00fd6ff53
- [v11,12/14] selftests: riscv: Fix vector tests
https://git.kernel.org/riscv/c/57d7713af93e
- [v11,13/14] selftests: riscv: Support xtheadvector in vector tests
https://git.kernel.org/riscv/c/c384c5d4a2ae
- [v11,14/14] riscv: Add ghostwrite vulnerability
https://git.kernel.org/riscv/c/4bf97069239b
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
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next prev parent reply other threads:[~2025-01-30 14:10 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-14 2:21 [PATCH v11 00/14] riscv: Add support for xtheadvector Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 01/14] dt-bindings: riscv: Add xtheadvector ISA extension description Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 02/14] dt-bindings: cpus: add a thead vlen register length property Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 03/14] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 04/14] riscv: Add thead and xtheadvector as a vendor extension Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 05/14] riscv: vector: Use vlenb from DT for thead Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 06/14] RISC-V: define the elements of the VCSR vector CSR Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 07/14] riscv: csr: Add CSR encodings for CSR_VXRM/CSR_VXSAT Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 08/14] riscv: Add xtheadvector instruction definitions Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 09/14] riscv: vector: Support xtheadvector save/restore Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 10/14] riscv: hwprobe: Add thead vendor extension probing Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:44 ` Yangyu Chen
2024-11-14 2:44 ` Yangyu Chen
2024-11-14 3:02 ` Charlie Jenkins
2024-11-14 3:02 ` Charlie Jenkins
2024-11-14 3:26 ` Yangyu Chen
2024-11-14 3:26 ` Yangyu Chen
2024-11-14 4:46 ` Charlie Jenkins
2024-11-14 4:46 ` Charlie Jenkins
2024-11-14 6:54 ` Yangyu Chen
2024-11-14 6:54 ` Yangyu Chen
2024-11-14 7:23 ` Charlie Jenkins
2024-11-14 7:23 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 11/14] riscv: hwprobe: Document thead vendor extensions and xtheadvector extension Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 12/14] selftests: riscv: Fix vector tests Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 13/14] selftests: riscv: Support xtheadvector in " Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-14 2:21 ` [PATCH v11 14/14] riscv: Add ghostwrite vulnerability Charlie Jenkins
2024-11-14 2:21 ` Charlie Jenkins
2024-11-27 9:23 ` [PATCH v11 00/14] riscv: Add support for xtheadvector Yangyu Chen
2024-11-27 9:23 ` Yangyu Chen
2025-01-30 14:10 ` patchwork-bot+linux-riscv [this message]
2025-01-30 14:10 ` patchwork-bot+linux-riscv
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