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From: Mark Hatle <mark.hatle@kernel.crashing.org>
To: openembedded-core@lists.openembedded.org
Subject: [PATCH v3 5/6] linux-yocto/6.12: riscv: Enable TUNE_FEATURES based KERNEL_FEATURES
Date: Wed,  2 Jul 2025 16:44:23 -0500	[thread overview]
Message-ID: <1751492664-12569-6-git-send-email-mark.hatle@kernel.crashing.org> (raw)
In-Reply-To: <1751492664-12569-1-git-send-email-mark.hatle@kernel.crashing.org>

From: Mark Hatle <mark.hatle@amd.com>

Allow the risc-v TUNE_FEATURES to select specific ISA (kconfig) selections
in the kernel config via config fragments selected by KERNEL_FEATURES.

This allows the following items to be selected dynamically:

    CONFIG_ARCH_RV32I
    CONFIG_ARCH_RV64I
    CONFIG_FPU
    CONFIG_RISCV_ISA_C
    CONFIG_RISCV_ISA_V
    CONFIG_RISCV_ISA_ZBB
    CONFIG_RISCV_ISA_ZICBOM
    CONFIG_RISCV_ISA_ZICBOZ
    CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI

Note: Some ISA options, such as CONFIG_RISCV_ISA_C may be reenabled by other
options such as CONFIG_EFI.  This is properly reported by the configuration
tooling.

Signed-off-by: Mark Hatle <mark.hatle@amd.com>
---
 meta/recipes-kernel/linux/linux-yocto.inc | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/meta/recipes-kernel/linux/linux-yocto.inc b/meta/recipes-kernel/linux/linux-yocto.inc
index 389329030d..4d0a726bb6 100644
--- a/meta/recipes-kernel/linux/linux-yocto.inc
+++ b/meta/recipes-kernel/linux/linux-yocto.inc
@@ -37,6 +37,22 @@ KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'efi', 'cfg/
 KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'numa', 'features/numa/numa.scc', '', d)}"
 KERNEL_FEATURES:append = " ${@bb.utils.contains('MACHINE_FEATURES', 'vfat', 'cfg/fs/vfat.scc', '', d)}"
 
+KERNEL_FEATURES_RISCV = "\
+    arch/riscv/tunes/riscv-isa-clear.scc \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'rv 32 i m a', 'arch/riscv/tunes/riscv-isa-rv32i.scc',  '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'rv 64 i m a', 'arch/riscv/tunes/riscv-isa-rv64i.scc',  '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'f d',         'arch/riscv/tunes/riscv-isa-fpu.scc',    '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'c',           'arch/riscv/tunes/riscv-isa-c.scc',      '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'v',           'arch/riscv/tunes/riscv-isa-v.scc',      '', d)} \
+    ${@bb.utils.contains_any('TUNE_FEATURES', 'b zba',       'arch/riscv/tunes/riscv-isa-zba.scc',    '', d)} \
+    ${@bb.utils.contains_any('TUNE_FEATURES', 'b zbb',       'arch/riscv/tunes/riscv-isa-zbb.scc',    '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'zbc',         'arch/riscv/tunes/riscv-isa-zbc.scc',    '', d)} \
+    ${@bb.utils.contains(    'TUNE_FEATURES', 'zicbom',      'arch/riscv/tunes/riscv-isa-zicbom.scc', '', d)} \
+    "
+
+KERNEL_FEATURES:append:riscv32 = " ${KERNEL_FEATURES_RISCV}"
+KERNEL_FEATURES:append:riscv64 = " ${KERNEL_FEATURES_RISCV}"
+
 # A KMACHINE is the mapping of a yocto $MACHINE to what is built
 # by the kernel. This is typically the branch that should be built,
 # and it can be specific to the machine or shared
-- 
2.34.1



  parent reply	other threads:[~2025-07-02 21:44 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-02 21:44 [PATCH v3 0/6] ISA based RISC-V tune implementation Mark Hatle
2025-07-02 21:44 ` [PATCH v3 1/6] u-boot: Dynamic RISC-V ISA configuration Mark Hatle
2025-07-02 21:44 ` [PATCH v3 2/6] features_check.bbclass: Add support for required TUNE_FEATURES Mark Hatle
2025-07-02 21:44 ` [PATCH v3 3/6] kernel.bbclass: State riscv required tune_features for Linux Mark Hatle
2025-07-02 21:44 ` [PATCH v3 4/6] linux-yocto/6.12: riscv: Enable dynamic ISA selection Mark Hatle
2025-07-02 21:44 ` Mark Hatle [this message]
2025-07-02 21:44 ` [PATCH v3 6/6] qemuriscv: Dynamically configure qemu CPU Mark Hatle
2025-07-09  9:17   ` [OE-core] " Richard Purdie
2025-07-09 14:54     ` Mark Hatle
2025-07-09 16:23       ` Khem Raj
2025-07-09 21:23         ` Mark Hatle
2025-07-09  7:42 ` [OE-core] [PATCH v3 0/6] ISA based RISC-V tune implementation Richard Purdie
2025-07-09 16:26   ` Khem Raj

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