Re: [PATCH 0/2] riscv: mm: Use mmu-type from FDT as SATP mode limit - patchwork-bot+linux-riscv

From: patchwork-bot+linux-riscv@kernel.org
To: Junhui Liu <junhui.liu@pigmoral.tech>
Cc: linux-riscv@lists.infradead.org, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] riscv: mm: Use mmu-type from FDT as SATP mode limit
Date: Wed, 06 Aug 2025 17:15:39 +0000	[thread overview]
Message-ID: <175450053927.2863135.18156029900049802152.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20250722-satp-from-fdt-v1-0-5ba22218fa5f@pigmoral.tech>

Hello:

This series was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:

On Tue, 22 Jul 2025 00:53:09 +0800 you wrote:
> This patch series improves RISC-V kernel compatibility and robustness by
> refining how the SATP mode is determined during early boot. Some RISC-V
> implementations, such as the Anlogic DR1V90 FPSoC with a UX900 RISC-V
> core designed by Nuclei, which I am currently attempting to run the
> mainline kernel on [1], may hang when attempting to write an unsupported
> SATP mode.
> 
> [...]

Here is the summary with links:
  - [1/2] riscv: mm: Return intended SATP mode for noXlvl options
    https://git.kernel.org/riscv/c/75ede0a8e07b
  - [2/2] riscv: mm: Use mmu-type from FDT to limit SATP mode
    https://git.kernel.org/riscv/c/a870d4f78f11

You are awesome, thank you!
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