[PATCH 0/1] introduce ioremap_wc()

[PATCH 0/1] introduce ioremap_wc()

[Yunhui Cui]

Compared with IO attributes, NC attributes can improve performance,
specifically in these aspects: Relaxed Order, Gathering, Supports Read
Speculation, Supports Unaligned Access.

When I replied to this patch (https://lore.kernel.org/all/CAEEQ3wmVPrZ6s8msM8RgcyZePGhXM1ikYMc5wW2n8q3Bf90EVw@mail.gmail.com/),
I found the author's email address was invalid. So, based on this patch,
I made slight modifications and resubmitted it.


Yunhui Cui (1):
  riscv: introduce ioremap_wc()

 arch/riscv/include/asm/io.h      | 4 ++++
 arch/riscv/include/asm/pgtable.h | 1 +
 2 files changed, 5 insertions(+)

-- 
2.39.5


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[PATCH 0/1] introduce ioremap_wc()

[Yunhui Cui]

Compared with IO attributes, NC attributes can improve performance,
specifically in these aspects: Relaxed Order, Gathering, Supports Read
Speculation, Supports Unaligned Access.

When I replied to this patch (https://lore.kernel.org/all/CAEEQ3wmVPrZ6s8msM8RgcyZePGhXM1ikYMc5wW2n8q3Bf90EVw@mail.gmail.com/),
I found the author's email address was invalid. So, based on this patch,
I made slight modifications and resubmitted it.


Yunhui Cui (1):
  riscv: introduce ioremap_wc()

 arch/riscv/include/asm/io.h      | 4 ++++
 arch/riscv/include/asm/pgtable.h | 1 +
 2 files changed, 5 insertions(+)

-- 
2.39.5

[PATCH 1/1] riscv: introduce ioremap_wc()

[Yunhui Cui]

Compared with IO attributes, NC attributes can improve performance,
specifically in these aspects: Relaxed Order, Gathering, Supports Read
Speculation, Supports Unaligned Access.

Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
Signed-off-by: Qingfang Deng <qingfang.deng@siflower.com.cn>
---
 arch/riscv/include/asm/io.h      | 4 ++++
 arch/riscv/include/asm/pgtable.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index a0e51840b9db4..09bb5f57a9d34 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -28,6 +28,10 @@
 #ifdef CONFIG_MMU
 #define IO_SPACE_LIMIT		(PCI_IO_SIZE - 1)
 #define PCI_IOBASE		((void __iomem *)PCI_IO_START)
+
+#define ioremap_wc(addr, size)	\
+	ioremap_prot((addr), (size), __pgprot(_PAGE_KERNEL_NC))
+
 #endif /* CONFIG_MMU */
 
 /*
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 91697fbf1f901..3d17399a06c77 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -203,6 +203,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata;
 
 #define PAGE_TABLE		__pgprot(_PAGE_TABLE)
 
+#define _PAGE_KERNEL_NC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_NOCACHE)
 #define _PAGE_IOREMAP	((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
 #define PAGE_KERNEL_IO		__pgprot(_PAGE_IOREMAP)
 
-- 
2.39.5


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[PATCH 1/1] riscv: introduce ioremap_wc()

[Yunhui Cui]

Compared with IO attributes, NC attributes can improve performance,
specifically in these aspects: Relaxed Order, Gathering, Supports Read
Speculation, Supports Unaligned Access.

Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
Signed-off-by: Qingfang Deng <qingfang.deng@siflower.com.cn>
---
 arch/riscv/include/asm/io.h      | 4 ++++
 arch/riscv/include/asm/pgtable.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index a0e51840b9db4..09bb5f57a9d34 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -28,6 +28,10 @@
 #ifdef CONFIG_MMU
 #define IO_SPACE_LIMIT		(PCI_IO_SIZE - 1)
 #define PCI_IOBASE		((void __iomem *)PCI_IO_START)
+
+#define ioremap_wc(addr, size)	\
+	ioremap_prot((addr), (size), __pgprot(_PAGE_KERNEL_NC))
+
 #endif /* CONFIG_MMU */
 
 /*
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 91697fbf1f901..3d17399a06c77 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -203,6 +203,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata;
 
 #define PAGE_TABLE		__pgprot(_PAGE_TABLE)
 
+#define _PAGE_KERNEL_NC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_NOCACHE)
 #define _PAGE_IOREMAP	((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
 #define PAGE_KERNEL_IO		__pgprot(_PAGE_IOREMAP)
 
-- 
2.39.5

Re: [PATCH 1/1] riscv: introduce ioremap_wc()

[Alexandre Ghiti]

Hi Yunhui,

On 7/22/25 11:15, Yunhui Cui wrote:
> Compared with IO attributes, NC attributes can improve performance,
> specifically in these aspects: Relaxed Order, Gathering, Supports Read
> Speculation, Supports Unaligned Access.
>
> Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> Signed-off-by: Qingfang Deng <qingfang.deng@siflower.com.cn>
> ---
>   arch/riscv/include/asm/io.h      | 4 ++++
>   arch/riscv/include/asm/pgtable.h | 1 +
>   2 files changed, 5 insertions(+)
>
> diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
> index a0e51840b9db4..09bb5f57a9d34 100644
> --- a/arch/riscv/include/asm/io.h
> +++ b/arch/riscv/include/asm/io.h
> @@ -28,6 +28,10 @@
>   #ifdef CONFIG_MMU
>   #define IO_SPACE_LIMIT		(PCI_IO_SIZE - 1)
>   #define PCI_IOBASE		((void __iomem *)PCI_IO_START)
> +
> +#define ioremap_wc(addr, size)	\
> +	ioremap_prot((addr), (size), __pgprot(_PAGE_KERNEL_NC))
> +
>   #endif /* CONFIG_MMU */
>   
>   /*
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 91697fbf1f901..3d17399a06c77 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -203,6 +203,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata;
>   
>   #define PAGE_TABLE		__pgprot(_PAGE_TABLE)
>   
> +#define _PAGE_KERNEL_NC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_NOCACHE)
>   #define _PAGE_IOREMAP	((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
>   #define PAGE_KERNEL_IO		__pgprot(_PAGE_IOREMAP)
>   


I have just confirmed with Ved that mapping WC to NC is the correct 
thing to do, so:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

And I'll take that for 6.17.

Thanks,

Alex


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Re: [PATCH 1/1] riscv: introduce ioremap_wc()

[Alexandre Ghiti]

Hi Yunhui,

On 7/22/25 11:15, Yunhui Cui wrote:
> Compared with IO attributes, NC attributes can improve performance,
> specifically in these aspects: Relaxed Order, Gathering, Supports Read
> Speculation, Supports Unaligned Access.
>
> Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> Signed-off-by: Qingfang Deng <qingfang.deng@siflower.com.cn>
> ---
>   arch/riscv/include/asm/io.h      | 4 ++++
>   arch/riscv/include/asm/pgtable.h | 1 +
>   2 files changed, 5 insertions(+)
>
> diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
> index a0e51840b9db4..09bb5f57a9d34 100644
> --- a/arch/riscv/include/asm/io.h
> +++ b/arch/riscv/include/asm/io.h
> @@ -28,6 +28,10 @@
>   #ifdef CONFIG_MMU
>   #define IO_SPACE_LIMIT		(PCI_IO_SIZE - 1)
>   #define PCI_IOBASE		((void __iomem *)PCI_IO_START)
> +
> +#define ioremap_wc(addr, size)	\
> +	ioremap_prot((addr), (size), __pgprot(_PAGE_KERNEL_NC))
> +
>   #endif /* CONFIG_MMU */
>   
>   /*
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 91697fbf1f901..3d17399a06c77 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -203,6 +203,7 @@ extern struct pt_alloc_ops pt_ops __meminitdata;
>   
>   #define PAGE_TABLE		__pgprot(_PAGE_TABLE)
>   
> +#define _PAGE_KERNEL_NC ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_NOCACHE)
>   #define _PAGE_IOREMAP	((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO)
>   #define PAGE_KERNEL_IO		__pgprot(_PAGE_IOREMAP)
>   


I have just confirmed with Ved that mapping WC to NC is the correct 
thing to do, so:

Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>

And I'll take that for 6.17.

Thanks,

Alex

Re: [PATCH 0/1] introduce ioremap_wc()

[patchwork-bot+linux-riscv]

Hello:

This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:

On Tue, 22 Jul 2025 17:15:03 +0800 you wrote:
> Compared with IO attributes, NC attributes can improve performance,
> specifically in these aspects: Relaxed Order, Gathering, Supports Read
> Speculation, Supports Unaligned Access.
> 
> When I replied to this patch (https://lore.kernel.org/all/CAEEQ3wmVPrZ6s8msM8RgcyZePGhXM1ikYMc5wW2n8q3Bf90EVw@mail.gmail.com/),
> I found the author's email address was invalid. So, based on this patch,
> I made slight modifications and resubmitted it.
> 
> [...]

Here is the summary with links:
  - [1/1] riscv: introduce ioremap_wc()
    https://git.kernel.org/riscv/c/5ec6b493183c

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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Re: [PATCH 0/1] introduce ioremap_wc()

[patchwork-bot+linux-riscv]

Hello:

This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:

On Tue, 22 Jul 2025 17:15:03 +0800 you wrote:
> Compared with IO attributes, NC attributes can improve performance,
> specifically in these aspects: Relaxed Order, Gathering, Supports Read
> Speculation, Supports Unaligned Access.
> 
> When I replied to this patch (https://lore.kernel.org/all/CAEEQ3wmVPrZ6s8msM8RgcyZePGhXM1ikYMc5wW2n8q3Bf90EVw@mail.gmail.com/),
> I found the author's email address was invalid. So, based on this patch,
> I made slight modifications and resubmitted it.
> 
> [...]

Here is the summary with links:
  - [1/1] riscv: introduce ioremap_wc()
    https://git.kernel.org/riscv/c/5ec6b493183c

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html