* [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
@ 2025-07-11 9:04 ` Pu Lehui
0 siblings, 0 replies; 8+ messages in thread
From: Pu Lehui @ 2025-07-11 9:04 UTC (permalink / raw)
To: linux-riscv, linux-kernel; +Cc: Palmer Dabbelt, Alexandre Ghiti, Pu Lehui
From: Pu Lehui <pulehui@huawei.com>
The implement of cmpxchg() in riscv is based on atomic primitives and
has NMI-safe features, so it can be used safely in the in_nmi context.
ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
this config needs to be selected, otherwise kprobetrace will not be
available.
Signed-off-by: Pu Lehui <pulehui@huawei.com>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 36061f4732b7..0e2dfa98338a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -23,6 +23,7 @@ config RISCV
select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
+ select ARCH_HAVE_NMI_SAFE_CMPXCHG
select ARCH_HAS_BINFMT_FLAT
select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
2025-07-11 9:04 ` Pu Lehui
@ 2025-07-17 2:00 ` Pu Lehui
-1 siblings, 0 replies; 8+ messages in thread
From: Pu Lehui @ 2025-07-17 2:00 UTC (permalink / raw)
To: Palmer Dabbelt, Alexandre Ghiti, linux-riscv, linux-kernel; +Cc: Pu Lehui
On 2025/7/11 17:04, Pu Lehui wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
Gentle ping~
The issue can be reproduced by the following steps:
cd /sys/kernel/debug/tracing/
echo 'p do_nanosleep' > kprobe_events
echo 1 > events/kprobes/enable
sleep 1
cat trace # trace log will not show without this patch
> available.
>
> Signed-off-by: Pu Lehui <pulehui@huawei.com>
> ---
> arch/riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 36061f4732b7..0e2dfa98338a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -23,6 +23,7 @@ config RISCV
> select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
> + select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_HAS_BINFMT_FLAT
> select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
> select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
@ 2025-07-17 2:00 ` Pu Lehui
0 siblings, 0 replies; 8+ messages in thread
From: Pu Lehui @ 2025-07-17 2:00 UTC (permalink / raw)
To: Palmer Dabbelt, Alexandre Ghiti, linux-riscv, linux-kernel; +Cc: Pu Lehui
On 2025/7/11 17:04, Pu Lehui wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
Gentle ping~
The issue can be reproduced by the following steps:
cd /sys/kernel/debug/tracing/
echo 'p do_nanosleep' > kprobe_events
echo 1 > events/kprobes/enable
sleep 1
cat trace # trace log will not show without this patch
> available.
>
> Signed-off-by: Pu Lehui <pulehui@huawei.com>
> ---
> arch/riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 36061f4732b7..0e2dfa98338a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -23,6 +23,7 @@ config RISCV
> select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
> + select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_HAS_BINFMT_FLAT
> select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
> select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
2025-07-11 9:04 ` Pu Lehui
@ 2025-07-17 7:38 ` Alexandre Ghiti
-1 siblings, 0 replies; 8+ messages in thread
From: Alexandre Ghiti @ 2025-07-17 7:38 UTC (permalink / raw)
To: Pu Lehui, linux-riscv, linux-kernel; +Cc: Palmer Dabbelt, Pu Lehui
Hi Pu,
On 7/11/25 11:04, Pu Lehui wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
> available.
>
> Signed-off-by: Pu Lehui <pulehui@huawei.com>
> ---
> arch/riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 36061f4732b7..0e2dfa98338a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -23,6 +23,7 @@ config RISCV
> select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
> + select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_HAS_BINFMT_FLAT
> select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
> select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
Given the definition of ARCH_HAVE_NMI_SAFE_CMPXCHG in commit
df013ffb8119 ("Add Kconfig option ARCH_HAVE_NMI_SAFE_CMPXCHG"), we can
indeed enable this config, so:
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
And I followed your instructions in your answer, it works as you
presented so:
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
I'll send this as part of my 6.17 PR.
Thanks,
Alex
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
@ 2025-07-17 7:38 ` Alexandre Ghiti
0 siblings, 0 replies; 8+ messages in thread
From: Alexandre Ghiti @ 2025-07-17 7:38 UTC (permalink / raw)
To: Pu Lehui, linux-riscv, linux-kernel; +Cc: Palmer Dabbelt, Pu Lehui
Hi Pu,
On 7/11/25 11:04, Pu Lehui wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
> available.
>
> Signed-off-by: Pu Lehui <pulehui@huawei.com>
> ---
> arch/riscv/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 36061f4732b7..0e2dfa98338a 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -23,6 +23,7 @@ config RISCV
> select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
> select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
> + select ARCH_HAVE_NMI_SAFE_CMPXCHG
> select ARCH_HAS_BINFMT_FLAT
> select ARCH_HAS_CRC32 if RISCV_ISA_ZBC
> select ARCH_HAS_CRC64 if 64BIT && RISCV_ISA_ZBC
Given the definition of ARCH_HAVE_NMI_SAFE_CMPXCHG in commit
df013ffb8119 ("Add Kconfig option ARCH_HAVE_NMI_SAFE_CMPXCHG"), we can
indeed enable this config, so:
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
And I followed your instructions in your answer, it works as you
presented so:
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
I'll send this as part of my 6.17 PR.
Thanks,
Alex
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
2025-07-11 9:04 ` Pu Lehui
@ 2025-08-06 17:15 ` patchwork-bot+linux-riscv
-1 siblings, 0 replies; 8+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-08-06 17:15 UTC (permalink / raw)
To: Pu Lehui; +Cc: linux-riscv, linux-kernel, palmer, alex, pulehui
Hello:
This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:
On Fri, 11 Jul 2025 09:04:43 +0000 you wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
> available.
>
> [...]
Here is the summary with links:
- [-next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
https://git.kernel.org/riscv/c/9ad032ba418c
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH -next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
@ 2025-08-06 17:15 ` patchwork-bot+linux-riscv
0 siblings, 0 replies; 8+ messages in thread
From: patchwork-bot+linux-riscv @ 2025-08-06 17:15 UTC (permalink / raw)
To: Pu Lehui; +Cc: linux-riscv, linux-kernel, palmer, alex, pulehui
Hello:
This patch was applied to riscv/linux.git (for-next)
by Alexandre Ghiti <alexghiti@rivosinc.com>:
On Fri, 11 Jul 2025 09:04:43 +0000 you wrote:
> From: Pu Lehui <pulehui@huawei.com>
>
> The implement of cmpxchg() in riscv is based on atomic primitives and
> has NMI-safe features, so it can be used safely in the in_nmi context.
> ftrace's ringbuffer relies on NMI-safe cmpxchg() in the NMI context.
> Currently, in_nmi() is true when riscv kprobe is in trap-based mode, so
> this config needs to be selected, otherwise kprobetrace will not be
> available.
>
> [...]
Here is the summary with links:
- [-next] riscv: Enable ARCH_HAVE_NMI_SAFE_CMPXCHG
https://git.kernel.org/riscv/c/9ad032ba418c
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
^ permalink raw reply [flat|nested] 8+ messages in thread