* [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
@ 2015-06-25 22:39 ` Sergei Shtylyov
0 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:39 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
Hello.
Here's the set of 3 patches against the 'fixes' branch of Linus Walleij's
'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on R-Car SoCs
and then remove unused GPIO pins for R8A7790/1.
[1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
[2/3] sh-pfc: r8a7790 remove non-existing GPIO pins
[3/3] sh-pfc: r8a7791 remove non-existing GPIO pins
WBR, Sergei
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
2015-06-25 22:39 ` Sergei Shtylyov
@ 2015-06-25 22:40 ` Sergei Shtylyov
-1 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:40 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
GPIO space becomes actually sparse. This happens because the _GP_GPIO() macro
includes an indexed initializer which causes the "holes" (array entries filled
with all 0s) between the groups of the existing GPIOs; and the driver can't
cope with that. There seems to be no reason to use the indexed initializer,
so we can remove the index specifier and so avoid the "holes".
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 3:
- new patch.
drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
===================================================================
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -224,7 +224,7 @@ struct sh_pfc_soc_info {
/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
#define _GP_GPIO(bank, _pin, _name, sfx) \
- [(bank * 32) + _pin] = { \
+ { \
.pin = (bank * 32) + _pin, \
.name = __stringify(_name), \
.enum_id = _name##_DATA, \
^ permalink raw reply [flat|nested] 28+ messages in thread* [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
@ 2015-06-25 22:40 ` Sergei Shtylyov
0 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:40 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
GPIO space becomes actually sparse. This happens because the _GP_GPIO() macro
includes an indexed initializer which causes the "holes" (array entries filled
with all 0s) between the groups of the existing GPIOs; and the driver can't
cope with that. There seems to be no reason to use the indexed initializer,
so we can remove the index specifier and so avoid the "holes".
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 3:
- new patch.
drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
=================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -224,7 +224,7 @@ struct sh_pfc_soc_info {
/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
#define _GP_GPIO(bank, _pin, _name, sfx) \
- [(bank * 32) + _pin] = { \
+ { \
.pin = (bank * 32) + _pin, \
.name = __stringify(_name), \
.enum_id = _name##_DATA, \
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
2015-06-25 22:40 ` Sergei Shtylyov
@ 2015-07-07 17:39 ` Laurent Pinchart
-1 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-07 17:39 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: linus.walleij, linux-sh, linux-gpio
Hi Sergei,
Thank you for the patch.
On Friday 26 June 2015 01:40:56 Sergei Shtylyov wrote:
> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when
> the GPIO space becomes actually sparse. This happens because the
> _GP_GPIO() macro includes an indexed initializer which causes the "holes"
> (array entries filled with all 0s) between the groups of the existing
> GPIOs; and the driver can't cope with that. There seems to be no reason
> to use the indexed initializer, so we can remove the index specifier and so
> avoid the "holes".
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
I initially thought that this patch looked too good to be true. The fix is so
simple, there must have been a reason why _GP_GPIO used indexed initializers.
I then tried to find that reason and failed.
I still feel that this is too simple to be true, but I have no objective
reason to push back, so
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
for the whole series, provided you have tested it, and paid attention to pins
after the holes.
> ---
> Changes in version 3:
> - new patch.
>
> drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
> ===================================================================
> --- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h
> +++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
> @@ -224,7 +224,7 @@ struct sh_pfc_soc_info {
>
> /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
> #define _GP_GPIO(bank, _pin, _name, sfx) \
> - [(bank * 32) + _pin] = { \
> + { \
> .pin = (bank * 32) + _pin, \
> .name = __stringify(_name), \
> .enum_id = _name##_DATA, \
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
@ 2015-07-07 17:39 ` Laurent Pinchart
0 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-07 17:39 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: linus.walleij, linux-sh, linux-gpio
Hi Sergei,
Thank you for the patch.
On Friday 26 June 2015 01:40:56 Sergei Shtylyov wrote:
> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when
> the GPIO space becomes actually sparse. This happens because the
> _GP_GPIO() macro includes an indexed initializer which causes the "holes"
> (array entries filled with all 0s) between the groups of the existing
> GPIOs; and the driver can't cope with that. There seems to be no reason
> to use the indexed initializer, so we can remove the index specifier and so
> avoid the "holes".
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
I initially thought that this patch looked too good to be true. The fix is so
simple, there must have been a reason why _GP_GPIO used indexed initializers.
I then tried to find that reason and failed.
I still feel that this is too simple to be true, but I have no objective
reason to push back, so
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
for the whole series, provided you have tested it, and paid attention to pins
after the holes.
> ---
> Changes in version 3:
> - new patch.
>
> drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
> =================================> --- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/sh_pfc.h
> +++ linux-pinctrl/drivers/pinctrl/sh-pfc/sh_pfc.h
> @@ -224,7 +224,7 @@ struct sh_pfc_soc_info {
>
> /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
> #define _GP_GPIO(bank, _pin, _name, sfx) \
> - [(bank * 32) + _pin] = { \
> + { \
> .pin = (bank * 32) + _pin, \
> .name = __stringify(_name), \
> .enum_id = _name##_DATA, \
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
2015-07-07 17:39 ` Laurent Pinchart
@ 2015-07-08 7:37 ` Geert Uytterhoeven
-1 siblings, 0 replies; 28+ messages in thread
From: Geert Uytterhoeven @ 2015-07-08 7:37 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Sergei Shtylyov, Linus Walleij, Linux-sh list,
linux-gpio@vger.kernel.org
On Tue, Jul 7, 2015 at 7:39 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Friday 26 June 2015 01:40:56 Sergei Shtylyov wrote:
>> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
>> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when
>> the GPIO space becomes actually sparse. This happens because the
>> _GP_GPIO() macro includes an indexed initializer which causes the "holes"
>> (array entries filled with all 0s) between the groups of the existing
>> GPIOs; and the driver can't cope with that. There seems to be no reason
>> to use the indexed initializer, so we can remove the index specifier and so
>> avoid the "holes".
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> I initially thought that this patch looked too good to be true. The fix is so
> simple, there must have been a reason why _GP_GPIO used indexed initializers.
> I then tried to find that reason and failed.
>
> I still feel that this is too simple to be true, but I have no objective
> reason to push back, so
:-)
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> for the whole series, provided you have tested it, and paid attention to pins
> after the holes.
On r8a7791/koelsch, the switches (gpio banks 5 and 7) and LEDs (gpio bank 2)
still work, so
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
@ 2015-07-08 7:37 ` Geert Uytterhoeven
0 siblings, 0 replies; 28+ messages in thread
From: Geert Uytterhoeven @ 2015-07-08 7:37 UTC (permalink / raw)
To: Laurent Pinchart
Cc: Sergei Shtylyov, Linus Walleij, Linux-sh list,
linux-gpio@vger.kernel.org
On Tue, Jul 7, 2015 at 7:39 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> On Friday 26 June 2015 01:40:56 Sergei Shtylyov wrote:
>> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
>> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when
>> the GPIO space becomes actually sparse. This happens because the
>> _GP_GPIO() macro includes an indexed initializer which causes the "holes"
>> (array entries filled with all 0s) between the groups of the existing
>> GPIOs; and the driver can't cope with that. There seems to be no reason
>> to use the indexed initializer, so we can remove the index specifier and so
>> avoid the "holes".
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> I initially thought that this patch looked too good to be true. The fix is so
> simple, there must have been a reason why _GP_GPIO used indexed initializers.
> I then tried to find that reason and failed.
>
> I still feel that this is too simple to be true, but I have no objective
> reason to push back, so
:-)
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> for the whole series, provided you have tested it, and paid attention to pins
> after the holes.
On r8a7791/koelsch, the switches (gpio banks 5 and 7) and LEDs (gpio bank 2)
still work, so
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
2015-06-25 22:40 ` Sergei Shtylyov
@ 2015-07-13 20:29 ` Linus Walleij
-1 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:29 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:40 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
> GPIO space becomes actually sparse. This happens because the _GP_GPIO() macro
> includes an indexed initializer which causes the "holes" (array entries filled
> with all 0s) between the groups of the existing GPIOs; and the driver can't
> cope with that. There seems to be no reason to use the indexed initializer,
> so we can remove the index specifier and so avoid the "holes".
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
@ 2015-07-13 20:29 ` Linus Walleij
0 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:29 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:40 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> The PFC driver causes the kernel to hang on the R-Car gen2 SoC based boards
> when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
> GPIO space becomes actually sparse. This happens because the _GP_GPIO() macro
> includes an indexed initializer which causes the "holes" (array entries filled
> with all 0s) between the groups of the existing GPIOs; and the driver can't
> cope with that. There seems to be no reason to use the indexed initializer,
> so we can remove the index specifier and so avoid the "holes".
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for fixes.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v3 2/3] sh-pfc: r8a7790: remove non-existing GPIO pins
2015-06-25 22:39 ` Sergei Shtylyov
@ 2015-06-25 22:42 ` Sergei Shtylyov
-1 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:42 UTC (permalink / raw)
To: linus.walleij; +Cc: linux-sh, laurent.pinchart, linux-gpio
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- renamed the patch.
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
===================================================================
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -27,10 +27,27 @@
#include "core.h"
#include "sh_pfc.h"
+#define PORT_GP_30(bank, fn, sfx) \
+ PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
+ PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
+ PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
+ PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
+ PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
+ PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
+ PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
+ PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
+ PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
+ PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
+ PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
+ PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
+ PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
+ PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
+ PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx)
+
#define CPU_ALL_PORT(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
- PORT_GP_32(1, fn, sfx), \
- PORT_GP_32(2, fn, sfx), \
+ PORT_GP_30(1, fn, sfx), \
+ PORT_GP_30(2, fn, sfx), \
PORT_GP_32(3, fn, sfx), \
PORT_GP_32(4, fn, sfx), \
PORT_GP_32(5, fn, sfx)
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v3 2/3] sh-pfc: r8a7790: remove non-existing GPIO pins
@ 2015-06-25 22:42 ` Sergei Shtylyov
0 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:42 UTC (permalink / raw)
To: linus.walleij; +Cc: linux-sh, laurent.pinchart, linux-gpio
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- renamed the patch.
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
=================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -27,10 +27,27 @@
#include "core.h"
#include "sh_pfc.h"
+#define PORT_GP_30(bank, fn, sfx) \
+ PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
+ PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
+ PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
+ PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
+ PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
+ PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
+ PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
+ PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
+ PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
+ PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
+ PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
+ PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
+ PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
+ PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
+ PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx)
+
#define CPU_ALL_PORT(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
- PORT_GP_32(1, fn, sfx), \
- PORT_GP_32(2, fn, sfx), \
+ PORT_GP_30(1, fn, sfx), \
+ PORT_GP_30(2, fn, sfx), \
PORT_GP_32(3, fn, sfx), \
PORT_GP_32(4, fn, sfx), \
PORT_GP_32(5, fn, sfx)
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 2/3] sh-pfc: r8a7790: remove non-existing GPIO pins
2015-06-25 22:42 ` Sergei Shtylyov
@ 2015-07-13 20:30 ` Linus Walleij
-1 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:30 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:42 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for next merge window.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 2/3] sh-pfc: r8a7790: remove non-existing GPIO pins
@ 2015-07-13 20:30 ` Linus Walleij
0 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:30 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:42 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 2 are missing pins 30 and 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for next merge window.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
2015-06-25 22:39 ` Sergei Shtylyov
@ 2015-06-25 22:43 ` Sergei Shtylyov
-1 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:43 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- renamed the patch.
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
===================================================================
--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -14,15 +14,30 @@
#include "core.h"
#include "sh_pfc.h"
+#define PORT_GP_26(bank, fn, sfx) \
+ PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
+ PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
+ PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
+ PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
+ PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
+ PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
+ PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
+ PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
+ PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
+ PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
+ PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
+ PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
+ PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx)
+
#define CPU_ALL_PORT(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
- PORT_GP_32(1, fn, sfx), \
+ PORT_GP_26(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
PORT_GP_32(3, fn, sfx), \
PORT_GP_32(4, fn, sfx), \
PORT_GP_32(5, fn, sfx), \
PORT_GP_32(6, fn, sfx), \
- PORT_GP_32(7, fn, sfx)
+ PORT_GP_26(7, fn, sfx)
enum {
PINMUX_RESERVED = 0,
^ permalink raw reply [flat|nested] 28+ messages in thread* [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
@ 2015-06-25 22:43 ` Sergei Shtylyov
0 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-25 22:43 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes in version 2:
- renamed the patch.
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 19 +++++++++++++++++--
1 file changed, 17 insertions(+), 2 deletions(-)
Index: linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
=================================--- linux-pinctrl.orig/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ linux-pinctrl/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -14,15 +14,30 @@
#include "core.h"
#include "sh_pfc.h"
+#define PORT_GP_26(bank, fn, sfx) \
+ PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
+ PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
+ PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
+ PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
+ PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
+ PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
+ PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
+ PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
+ PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
+ PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
+ PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
+ PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
+ PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx)
+
#define CPU_ALL_PORT(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
- PORT_GP_32(1, fn, sfx), \
+ PORT_GP_26(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
PORT_GP_32(3, fn, sfx), \
PORT_GP_32(4, fn, sfx), \
PORT_GP_32(5, fn, sfx), \
PORT_GP_32(6, fn, sfx), \
- PORT_GP_32(7, fn, sfx)
+ PORT_GP_26(7, fn, sfx)
enum {
PINMUX_RESERVED = 0,
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
2015-06-25 22:43 ` Sergei Shtylyov
@ 2015-07-08 7:38 ` Geert Uytterhoeven
-1 siblings, 0 replies; 28+ messages in thread
From: Geert Uytterhoeven @ 2015-07-08 7:38 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Linus Walleij, Linux-sh list, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:43 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
On r8a7791/koelsch, the switches (gpio banks 5 and 7) and LEDs (gpio bank 2)
still work, so
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
@ 2015-07-08 7:38 ` Geert Uytterhoeven
0 siblings, 0 replies; 28+ messages in thread
From: Geert Uytterhoeven @ 2015-07-08 7:38 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: Linus Walleij, Linux-sh list, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:43 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
On r8a7791/koelsch, the switches (gpio banks 5 and 7) and LEDs (gpio bank 2)
still work, so
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
2015-06-25 22:43 ` Sergei Shtylyov
@ 2015-07-13 20:32 ` Linus Walleij
-1 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:32 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:43 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for next merge window.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7791: remove non-existing GPIO pins
@ 2015-07-13 20:32 ` Linus Walleij
0 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-07-13 20:32 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 12:43 AM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> GPIO banks 1 and 7 are missing pins 26 to 31. Remove them.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Patch applied for next merge window.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
2015-06-25 22:39 ` Sergei Shtylyov
@ 2015-06-26 20:51 ` Sergei Shtylyov
-1 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-26 20:51 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> Here's the set of 3 patches against the 'fixes' branch of Linus Walleij's
> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on R-Car SoCs
> and then remove unused GPIO pins for R8A7790/1.
> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
Note that this patch is necessary for the R8A7794 driver (already in
Linus' tree to work correctly.
WBR, Sergei
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
@ 2015-06-26 20:51 ` Sergei Shtylyov
0 siblings, 0 replies; 28+ messages in thread
From: Sergei Shtylyov @ 2015-06-26 20:51 UTC (permalink / raw)
To: linus.walleij, linux-sh, laurent.pinchart, linux-gpio
On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> Here's the set of 3 patches against the 'fixes' branch of Linus Walleij's
> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on R-Car SoCs
> and then remove unused GPIO pins for R8A7790/1.
> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
Note that this patch is necessary for the R8A7794 driver (already in
Linus' tree to work correctly.
WBR, Sergei
^ permalink raw reply [flat|nested] 28+ messages in thread* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
2015-06-26 20:51 ` Sergei Shtylyov
@ 2015-06-29 10:43 ` Linus Walleij
-1 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-06-29 10:43 UTC (permalink / raw)
To: Sergei Shtylyov, Laurent Pinchart
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
>
>> Here's the set of 3 patches against the 'fixes' branch of Linus
>> Walleij's
>> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on R-Car
>> SoCs
>> and then remove unused GPIO pins for R8A7790/1.
>
>
>> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
>
>
> Note that this patch is necessary for the R8A7794 driver (already in
> Linus' tree to work correctly.
Laurent is it OK to apply these three for fixes?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
@ 2015-06-29 10:43 ` Linus Walleij
0 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-06-29 10:43 UTC (permalink / raw)
To: Sergei Shtylyov, Laurent Pinchart
Cc: linux-sh@vger.kernel.org, Laurent Pinchart,
linux-gpio@vger.kernel.org
On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
>
>> Here's the set of 3 patches against the 'fixes' branch of Linus
>> Walleij's
>> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on R-Car
>> SoCs
>> and then remove unused GPIO pins for R8A7790/1.
>
>
>> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
>
>
> Note that this patch is necessary for the R8A7794 driver (already in
> Linus' tree to work correctly.
Laurent is it OK to apply these three for fixes?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
2015-06-29 10:43 ` Linus Walleij
@ 2015-07-03 23:29 ` Laurent Pinchart
-1 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-03 23:29 UTC (permalink / raw)
To: Linus Walleij
Cc: Sergei Shtylyov, Laurent Pinchart, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
Hello,
On Monday 29 June 2015 12:43:09 Linus Walleij wrote:
> On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov wrote:
> > On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> >> Here's the set of 3 patches against the 'fixes' branch of Linus
> >> Walleij's
> >> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on
> >> R-Car SoCs and then remove unused GPIO pins for R8A7790/1.
> >>
> >>
> >> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
> >>
> > Note that this patch is necessary for the R8A7794 driver (already in
> >
> > Linus' tree to work correctly.
>
> Laurent is it OK to apply these three for fixes?
Sorry for the delay. I'll try to review this patch set on Monday.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
@ 2015-07-03 23:29 ` Laurent Pinchart
0 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-03 23:29 UTC (permalink / raw)
To: Linus Walleij
Cc: Sergei Shtylyov, Laurent Pinchart, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
Hello,
On Monday 29 June 2015 12:43:09 Linus Walleij wrote:
> On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov wrote:
> > On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> >> Here's the set of 3 patches against the 'fixes' branch of Linus
> >> Walleij's
> >> 'linux-pinctrl.git' repo. Here we eliminate the pin array "holes" on
> >> R-Car SoCs and then remove unused GPIO pins for R8A7790/1.
> >>
> >>
> >> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
> >>
> > Note that this patch is necessary for the R8A7794 driver (already in
> >
> > Linus' tree to work correctly.
>
> Laurent is it OK to apply these three for fixes?
Sorry for the delay. I'll try to review this patch set on Monday.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
2015-06-29 10:43 ` Linus Walleij
@ 2015-07-07 20:58 ` Laurent Pinchart
-1 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-07 20:58 UTC (permalink / raw)
To: Linus Walleij
Cc: Sergei Shtylyov, Laurent Pinchart, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
Hi Linus,
On Monday 29 June 2015 12:43:09 Linus Walleij wrote:
> On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov wrote:
> > On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> >> Here's the set of 3 patches against the 'fixes' branch of Linus
> >> Walleij's 'linux-pinctrl.git' repo. Here we eliminate the pin array
> >> "holes" on R-Car SoCs and then remove unused GPIO pins for R8A7790/1.
> >>
> >> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
> >>
> > Note that this patch is necessary for the R8A7794 driver (already in
> > Linus' tree to work correctly.
>
> Laurent is it OK to apply these three for fixes?
You can apply 1/3 as a v4.2-rc fix, as pfc-r8a7794 merged in v4.2-rc1 is
broken without it. I would prefer delaying 2/3 and 3/3 to v4.3.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH v3 0/3] Remove non-existing GPIO pins for R8A7790/1
@ 2015-07-07 20:58 ` Laurent Pinchart
0 siblings, 0 replies; 28+ messages in thread
From: Laurent Pinchart @ 2015-07-07 20:58 UTC (permalink / raw)
To: Linus Walleij
Cc: Sergei Shtylyov, Laurent Pinchart, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
Hi Linus,
On Monday 29 June 2015 12:43:09 Linus Walleij wrote:
> On Fri, Jun 26, 2015 at 10:51 PM, Sergei Shtylyov wrote:
> > On 06/26/2015 01:39 AM, Sergei Shtylyov wrote:
> >> Here's the set of 3 patches against the 'fixes' branch of Linus
> >> Walleij's 'linux-pinctrl.git' repo. Here we eliminate the pin array
> >> "holes" on R-Car SoCs and then remove unused GPIO pins for R8A7790/1.
> >>
> >> [1/3] sh-pfc: fix sparse GPIOs for R-Car SoCs
> >>
> > Note that this patch is necessary for the R8A7794 driver (already in
> > Linus' tree to work correctly.
>
> Laurent is it OK to apply these three for fixes?
You can apply 1/3 as a v4.2-rc fix, as pfc-r8a7794 merged in v4.2-rc1 is
broken without it. I would prefer delaying 2/3 and 3/3 to v4.3.
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 28+ messages in thread