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From: patchwork-bot+linux-riscv@kernel.org
To: Sean Chang <seanwascoding@gmail.com>
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
	palmer@dabbelt.com, atish.patra@linux.dev, pjw@kernel.org,
	aou@eecs.berkeley.edu, alex@ghiti.fr, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
Date: Fri, 26 Jun 2026 08:21:23 +0000	[thread overview]
Message-ID: <178246208372.3816447.9810005317307164502.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20260608155252.4292-1-seanwascoding@gmail.com>

Hello:

This patch was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:

On Mon,  8 Jun 2026 23:52:52 +0800 you wrote:
> When compiling with sparse enabled (C=2), bitwise type warnings are
> triggered in the RISC-V KVM implementation. This occurs because the
> user-space data unboxing macro '__get_user_asm' performs implicit
> casting on restricted types without forcing the compiler's compliance.
> 
> Additionally, raw 'unsigned long *' pointers are used to access the
> SBI NACL shared memory, whereas the RISC-V SBI specification mandates
> that these structures must follow little-endian byte ordering.
> 
> [...]

Here is the summary with links:
  - [v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
    https://git.kernel.org/riscv/c/52738352a6f2

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



WARNING: multiple messages have this Message-ID (diff)
From: patchwork-bot+linux-riscv@kernel.org
To: Sean Chang <seanwascoding@gmail.com>
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
	palmer@dabbelt.com, atish.patra@linux.dev, pjw@kernel.org,
	aou@eecs.berkeley.edu, alex@ghiti.fr, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
Date: Fri, 26 Jun 2026 08:21:23 +0000	[thread overview]
Message-ID: <178246208372.3816447.9810005317307164502.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20260608155252.4292-1-seanwascoding@gmail.com>

Hello:

This patch was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:

On Mon,  8 Jun 2026 23:52:52 +0800 you wrote:
> When compiling with sparse enabled (C=2), bitwise type warnings are
> triggered in the RISC-V KVM implementation. This occurs because the
> user-space data unboxing macro '__get_user_asm' performs implicit
> casting on restricted types without forcing the compiler's compliance.
> 
> Additionally, raw 'unsigned long *' pointers are used to access the
> SBI NACL shared memory, whereas the RISC-V SBI specification mandates
> that these structures must follow little-endian byte ordering.
> 
> [...]

Here is the summary with links:
  - [v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
    https://git.kernel.org/riscv/c/52738352a6f2

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: patchwork-bot+linux-riscv@kernel.org
To: Sean Chang <seanwascoding@gmail.com>
Cc: linux-riscv@lists.infradead.org, anup@brainfault.org,
	palmer@dabbelt.com, atish.patra@linux.dev, pjw@kernel.org,
	aou@eecs.berkeley.edu, alex@ghiti.fr, kvm@vger.kernel.org,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
Date: Fri, 26 Jun 2026 08:21:23 +0000	[thread overview]
Message-ID: <178246208372.3816447.9810005317307164502.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20260608155252.4292-1-seanwascoding@gmail.com>

Hello:

This patch was applied to riscv/linux.git (fixes)
by Anup Patel <anup@brainfault.org>:

On Mon,  8 Jun 2026 23:52:52 +0800 you wrote:
> When compiling with sparse enabled (C=2), bitwise type warnings are
> triggered in the RISC-V KVM implementation. This occurs because the
> user-space data unboxing macro '__get_user_asm' performs implicit
> casting on restricted types without forcing the compiler's compliance.
> 
> Additionally, raw 'unsigned long *' pointers are used to access the
> SBI NACL shared memory, whereas the RISC-V SBI specification mandates
> that these structures must follow little-endian byte ordering.
> 
> [...]

Here is the summary with links:
  - [v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory
    https://git.kernel.org/riscv/c/52738352a6f2

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2026-06-26  8:21 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-08 15:52 [PATCH v1] riscv: kvm: Use endian-specific __lelong for NACL shared memory Sean Chang
2026-06-08 15:52 ` Sean Chang
2026-06-08 15:52 ` Sean Chang
2026-06-08 16:08 ` sashiko-bot
2026-06-14  6:00 ` Anup Patel
2026-06-14  6:00   ` Anup Patel
2026-06-14  6:00   ` Anup Patel
2026-06-26  8:21 ` patchwork-bot+linux-riscv [this message]
2026-06-26  8:21   ` patchwork-bot+linux-riscv
2026-06-26  8:21   ` patchwork-bot+linux-riscv

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