[PATCH v2 0/2] dpll: zl3073x: add Microchip ZL30643 support

[PATCH v2 0/2] dpll: zl3073x: add Microchip ZL30643 support

[Vincent Jardin via B4 Relay]

The Microchip ZL30643 (chip ID 0x0E3B) is a 3 DPLL channel member of
the ZL3064x timing family, register compatible with the
ZL30733 of the ZL3073x family.

Patch 1 describes it in the binding as a fallback to the register-
        equivalent microchip,zl30733.
Patch 2 adds the 0x0E3B runtime chip-ID table entry; no new match
        strings, the fallback binds via the existing microchip,zl30733
        entry.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
Changes in v2:
- bindings: describe ZL30643 as a fallback to the ZL30733 instead of a
  standalone compatible (based on Conor's questions).
- driver: drop the SPI/I2C/of_match additions: the fallback binds via
  microchip,zl30733; keep only the 0x0E3B chip-ID table entry needed
  for the runtime channel-count lookup.
- commit messages: comments on the datasheets and identity backing
  the REF_PHASE_COMP_32 flag reuse (Ivan's questions).
- Link to v1: https://lore.kernel.org/r/20260724-for-upstream-zl30643-v1-0-ea93ba4d85c8@free.fr

---
Vincent Jardin (2):
      dt-bindings: dpll: zl3073x: ZL30643 is compatible
      dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)

 .../devicetree/bindings/dpll/microchip,zl30731.yaml   | 19 +++++++++++++------
 drivers/dpll/zl3073x/core.c                           |  1 +
 2 files changed, 14 insertions(+), 6 deletions(-)
---
base-commit: 248951ddc14de84de3910f9b13f51491a8cd91df
change-id: 20260724-for-upstream-zl30643-8b23267b974f

Best regards,
-- 
Vincent Jardin <vjardin@free.fr>

[PATCH v2 0/2] dpll: zl3073x: add Microchip ZL30643 support

[Vincent Jardin]

The Microchip ZL30643 (chip ID 0x0E3B) is a 3 DPLL channel member of
the ZL3064x timing family, register compatible with the
ZL30733 of the ZL3073x family.

Patch 1 describes it in the binding as a fallback to the register-
        equivalent microchip,zl30733.
Patch 2 adds the 0x0E3B runtime chip-ID table entry; no new match
        strings, the fallback binds via the existing microchip,zl30733
        entry.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
Changes in v2:
- bindings: describe ZL30643 as a fallback to the ZL30733 instead of a
  standalone compatible (based on Conor's questions).
- driver: drop the SPI/I2C/of_match additions: the fallback binds via
  microchip,zl30733; keep only the 0x0E3B chip-ID table entry needed
  for the runtime channel-count lookup.
- commit messages: comments on the datasheets and identity backing
  the REF_PHASE_COMP_32 flag reuse (Ivan's questions).
- Link to v1: https://lore.kernel.org/r/20260724-for-upstream-zl30643-v1-0-ea93ba4d85c8@free.fr

---
Vincent Jardin (2):
      dt-bindings: dpll: zl3073x: ZL30643 is compatible
      dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)

 .../devicetree/bindings/dpll/microchip,zl30731.yaml   | 19 +++++++++++++------
 drivers/dpll/zl3073x/core.c                           |  1 +
 2 files changed, 14 insertions(+), 6 deletions(-)
---
base-commit: 248951ddc14de84de3910f9b13f51491a8cd91df
change-id: 20260724-for-upstream-zl30643-8b23267b974f

Best regards,
-- 
Vincent Jardin <vjardin@free.fr>

[PATCH v2 1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible

[Vincent Jardin via B4 Relay]

From: Vincent Jardin <vjardin@free.fr>

The Microchip ZL30643 (chip ID 0x0E3B) is a member of the ZL3064x
line card timing family. It is register compatible with the 3-channel
ZL30733 (chip ID 0x0E95) of the ZL3073x family: both datasheets
describe the same register map and use the same chip-ID encoding.

Describe it with a fallback to microchip,zl30733 rather than a new
standalone compatible.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
 .../devicetree/bindings/dpll/microchip,zl30731.yaml   | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
index fa5a8f8e390c..17983e6c3597 100644
--- a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
+++ b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
@@ -14,15 +14,22 @@ description:
   provides up to 5 independent DPLL channels, up to 10 differential or
   single-ended inputs and 10 differential or 20 single-ended outputs.
   These devices support both I2C and SPI interfaces.
+  The ZL3064x line card timing ICs  share the ZL3073x register map
+  and are described with a fallback to the register equivalent ZL3073x
+  part.
 
 properties:
   compatible:
-    enum:
-      - microchip,zl30731
-      - microchip,zl30732
-      - microchip,zl30733
-      - microchip,zl30734
-      - microchip,zl30735
+    oneOf:
+      - enum:
+          - microchip,zl30731
+          - microchip,zl30732
+          - microchip,zl30733
+          - microchip,zl30734
+          - microchip,zl30735
+      - items:
+          - const: microchip,zl30643
+          - const: microchip,zl30733
 
   reg:
     maxItems: 1

-- 
2.43.0

[PATCH v2 1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible

[Vincent Jardin]

The Microchip ZL30643 (chip ID 0x0E3B) is a member of the ZL3064x
line card timing family. It is register compatible with the 3-channel
ZL30733 (chip ID 0x0E95) of the ZL3073x family: both datasheets
describe the same register map and use the same chip-ID encoding.

Describe it with a fallback to microchip,zl30733 rather than a new
standalone compatible.

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
 .../devicetree/bindings/dpll/microchip,zl30731.yaml   | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
index fa5a8f8e390c..17983e6c3597 100644
--- a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
+++ b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
@@ -14,15 +14,22 @@ description:
   provides up to 5 independent DPLL channels, up to 10 differential or
   single-ended inputs and 10 differential or 20 single-ended outputs.
   These devices support both I2C and SPI interfaces.
+  The ZL3064x line card timing ICs  share the ZL3073x register map
+  and are described with a fallback to the register equivalent ZL3073x
+  part.
 
 properties:
   compatible:
-    enum:
-      - microchip,zl30731
-      - microchip,zl30732
-      - microchip,zl30733
-      - microchip,zl30734
-      - microchip,zl30735
+    oneOf:
+      - enum:
+          - microchip,zl30731
+          - microchip,zl30732
+          - microchip,zl30733
+          - microchip,zl30734
+          - microchip,zl30735
+      - items:
+          - const: microchip,zl30643
+          - const: microchip,zl30733
 
   reg:
     maxItems: 1

-- 
2.43.0

[PATCH v2 2/2] dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)

[Vincent Jardin via B4 Relay]

From: Vincent Jardin <vjardin@free.fr>

The Microchip ZL30643 is a 3-channel ZL3064x line-card part that is
register compatible with the ZL30733. Only the runtime chip-ID table
needs the 0x0E3B entry so the probe resolves the channel count (3)
and flags.

The ZL3073X_FLAG_REF_PHASE_COMP_32 flag applies unchanged: the
ref_phase path
  dpll_meas_ctrl::en -> ref_phase_0P/0N
  -> ref_phase_offset_compensation -> ref_phase_err_read_rqst
is identical between ZL3064x and ZL3073x. No new device flag is needed.

Test: once register, for instance, we get:

  devlink dev param set spi/spi0.0 name clock_id value 3733 cmode driverinit
  devlink dev reload spi/spi0.0
  devlink dev param set spi/spi2.1 name clock_id value 3643 cmode driverinit
  devlink dev reload spi/spi2.1

  dpll device show | grep clock-id
    clock-id: 3733
    clock-id: 3733
    clock-id: 3733
    clock-id: 3643
    clock-id: 3643
    clock-id: 3643

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
 drivers/dpll/zl3073x/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c
index 8e6416a4741d..4d07f69efb44 100644
--- a/drivers/dpll/zl3073x/core.c
+++ b/drivers/dpll/zl3073x/core.c
@@ -25,6 +25,7 @@
 
 static const struct zl3073x_chip_info zl3073x_chip_ids[] = {
 	ZL_CHIP_INFO(0x0E30, 2, ZL3073X_FLAG_REF_PHASE_COMP_32),
+	ZL_CHIP_INFO(0x0E3B, 3, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E93, 1, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E94, 2, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E95, 3, ZL3073X_FLAG_REF_PHASE_COMP_32),

-- 
2.43.0

[PATCH v2 2/2] dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)

[Vincent Jardin]

The Microchip ZL30643 is a 3-channel ZL3064x line-card part that is
register compatible with the ZL30733. Only the runtime chip-ID table
needs the 0x0E3B entry so the probe resolves the channel count (3)
and flags.

The ZL3073X_FLAG_REF_PHASE_COMP_32 flag applies unchanged: the
ref_phase path
  dpll_meas_ctrl::en -> ref_phase_0P/0N
  -> ref_phase_offset_compensation -> ref_phase_err_read_rqst
is identical between ZL3064x and ZL3073x. No new device flag is needed.

Test: once register, for instance, we get:

  devlink dev param set spi/spi0.0 name clock_id value 3733 cmode driverinit
  devlink dev reload spi/spi0.0
  devlink dev param set spi/spi2.1 name clock_id value 3643 cmode driverinit
  devlink dev reload spi/spi2.1

  dpll device show | grep clock-id
    clock-id: 3733
    clock-id: 3733
    clock-id: 3733
    clock-id: 3643
    clock-id: 3643
    clock-id: 3643

Signed-off-by: Vincent Jardin <vjardin@free.fr>
---
 drivers/dpll/zl3073x/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c
index 8e6416a4741d..4d07f69efb44 100644
--- a/drivers/dpll/zl3073x/core.c
+++ b/drivers/dpll/zl3073x/core.c
@@ -25,6 +25,7 @@
 
 static const struct zl3073x_chip_info zl3073x_chip_ids[] = {
 	ZL_CHIP_INFO(0x0E30, 2, ZL3073X_FLAG_REF_PHASE_COMP_32),
+	ZL_CHIP_INFO(0x0E3B, 3, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E93, 1, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E94, 2, ZL3073X_FLAG_REF_PHASE_COMP_32),
 	ZL_CHIP_INFO(0x0E95, 3, ZL3073X_FLAG_REF_PHASE_COMP_32),

-- 
2.43.0

Re: [PATCH v2 1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 500 bytes --]

On Thu, Jul 30, 2026 at 07:35:35PM +0200, Vincent Jardin wrote:
> The Microchip ZL30643 (chip ID 0x0E3B) is a member of the ZL3064x
> line card timing family. It is register compatible with the 3-channel
> ZL30733 (chip ID 0x0E95) of the ZL3073x family: both datasheets
> describe the same register map and use the same chip-ID encoding.
> 
> Describe it with a fallback to microchip,zl30733 rather than a new
> standalone compatible.

Acked-by: Conor Dooley <conor.dooley@microchip.com>


[-- Attachment #2: signature.asc --]
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Re: [PATCH v2 1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The DT binding adds a fallback string for the ZL30643 device, but the corresponding driver strictly checks the hardware chip ID against a hardcoded whitelist, causing probe to deterministically fail for the new hardware.
--

--- Patch [1]: [PATCH v2 1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible ---
commit f6998893262610471dd1ffc9397a1a575b09a8ed
Author: Vincent Jardin <vjardin@free.fr>

dt-bindings: dpll: zl3073x: ZL30643 is compatible

The Microchip ZL30643 (chip ID 0x0E3B) is a member of the ZL3064x line card
timing family. It is register compatible with the 3-channel ZL30733
(chip ID 0x0E95), so it is added with a fallback compatible string.

> diff --git a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
> index fa5a8f8e390cd..17983e6c35975 100644
> --- a/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
> +++ b/Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
[ ... ]
>    compatible:
> -    enum:
> -      - microchip,zl30731
> -      - microchip,zl30732
> -      - microchip,zl30733
> -      - microchip,zl30734
> -      - microchip,zl30735
> +    oneOf:
> +      - enum:
> +          - microchip,zl30731
> +          - microchip,zl30732
> +          - microchip,zl30733
> +          - microchip,zl30734
> +          - microchip,zl30735
> +      - items:
> +          - const: microchip,zl30643
> +          - const: microchip,zl30733

[Severity: Medium]
Will this device fail to probe because its chip ID is missing from the
driver's whitelist?

The commit message indicates the ZL30643 has chip ID 0x0E3B. However, in
drivers/dpll/zl3073x/core.c, zl3073x_dev_probe() explicitly validates the
read hardware ID against zl3073x_chip_ids:

drivers/dpll/zl3073x/core.c:zl3073x_dev_probe() {
	...
	rc = zl3073x_read_u16(zldev, ZL_REG_ID, &id);
	...
	/* Detect chip variant */
	for (i = 0; i < ARRAY_SIZE(zl3073x_chip_ids); i++) {
		if (zl3073x_chip_ids[i].id == id)
			break;
	}

	if (i == ARRAY_SIZE(zl3073x_chip_ids))
		return dev_err_probe(zldev->dev, -ENODEV,
				     "Unknown chip ID: 0x%04x\n", id);
	...
}

Since 0x0E3B is not present in zl3073x_chip_ids, it appears the fallback
compatibility will still result in the driver returning -ENODEV and
aborting the probe.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260730-for-upstream-zl30643-v2-0-0ea0bbd03755@free.fr?part=1

Re: [PATCH v2 0/2] dpll: zl3073x: add Microchip ZL30643 support

[patchwork-bot+netdevbpf]

Hello:

This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:

On Thu, 30 Jul 2026 19:35:34 +0200 you wrote:
> The Microchip ZL30643 (chip ID 0x0E3B) is a 3 DPLL channel member of
> the ZL3064x timing family, register compatible with the
> ZL30733 of the ZL3073x family.
> 
> Patch 1 describes it in the binding as a fallback to the register-
>         equivalent microchip,zl30733.
> Patch 2 adds the 0x0E3B runtime chip-ID table entry; no new match
>         strings, the fallback binds via the existing microchip,zl30733
>         entry.
> 
> [...]

Here is the summary with links:
  - [v2,1/2] dt-bindings: dpll: zl3073x: ZL30643 is compatible
    https://git.kernel.org/netdev/net-next/c/d4b0ad9a8174
  - [v2,2/2] dpll: zl3073x: recognize the ZL30643 chip ID (0x0E3B)
    https://git.kernel.org/netdev/net-next/c/24e4aff8983f

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
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