From: Srinivas Kandagatla <srini@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Michael Walle <michael@walle.cc>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alexey Charkov <alchark@flipper.net>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org
Subject: Re: (subset) [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID
Date: Mon, 14 Sep 2026 23:13:24 +0100 [thread overview]
Message-ID: <178942400455.686568.7345103522777056647.b4-ty@kernel.org> (raw)
In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net>
On Wed, 02 Sep 2026 17:07:51 +0400, Alexey Charkov wrote:
> Rockchip SoCs are shipped with a unique CPU ID in their internal OTP
> memory, and Rockchip bootloaders use it to give boards which have no
> dedicated storage for a MAC address a stable one anyway: they hash the CPU
> ID and patch the resulting addresses into the device tree they hand over.
>
> Kernels started without that fixup, e.g. straight from the SPL in Falcon
> mode or by any other loader which does not implement Rockchip's derivation,
> fall back to random MAC addresses which change on every boot.
>
> [...]
Applied, thanks!
[1/4] nvmem: rockchip-otp: Serialize reads
commit: 798be42019957b28b4fb897d7f9f6cf6712247db
Best regards,
--
Srinivas Kandagatla <srini@kernel.org>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Srinivas Kandagatla <srini@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Michael Walle <michael@walle.cc>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Finley Xiao <finley.xiao@rock-chips.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Alexey Charkov <alchark@flipper.net>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org
Subject: Re: (subset) [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID
Date: Mon, 14 Sep 2026 23:13:24 +0100 [thread overview]
Message-ID: <178942400455.686568.7345103522777056647.b4-ty@kernel.org> (raw)
In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net>
On Wed, 02 Sep 2026 17:07:51 +0400, Alexey Charkov wrote:
> Rockchip SoCs are shipped with a unique CPU ID in their internal OTP
> memory, and Rockchip bootloaders use it to give boards which have no
> dedicated storage for a MAC address a stable one anyway: they hash the CPU
> ID and patch the resulting addresses into the device tree they hand over.
>
> Kernels started without that fixup, e.g. straight from the SPL in Falcon
> mode or by any other loader which does not implement Rockchip's derivation,
> fall back to random MAC addresses which change on every boot.
>
> [...]
Applied, thanks!
[1/4] nvmem: rockchip-otp: Serialize reads
commit: 798be42019957b28b4fb897d7f9f6cf6712247db
Best regards,
--
Srinivas Kandagatla <srini@kernel.org>
next prev parent reply other threads:[~2026-09-14 22:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 13:07 [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov
2026-09-02 13:07 ` [PATCH v2 1/4] nvmem: rockchip-otp: Serialize reads Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov
2026-09-02 13:07 ` [PATCH v2 2/4] dt-bindings: nvmem: layouts: Add Rockchip OTP CPUID layout Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov
2026-09-02 13:15 ` sashiko-bot
2026-09-02 13:07 ` [PATCH v2 3/4] nvmem: layouts: Add Rockchip OTP CPUID layout driver Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov
2026-09-02 13:20 ` sashiko-bot
2026-09-14 22:23 ` Srinivas Kandagatla
2026-09-14 22:23 ` Srinivas Kandagatla
2026-09-02 13:07 ` [PATCH v2 4/4] arm64: dts: rockchip: Derive GMAC MAC addresses from OTP on RK3576 Alexey Charkov
2026-09-02 13:07 ` Alexey Charkov
2026-09-10 14:48 ` [PATCH v2 0/4] nvmem: Derive Rockchip MAC addresses from the OTP CPU ID Alexey Charkov
2026-09-10 14:48 ` Alexey Charkov
2026-09-17 22:18 ` Rob Herring
2026-09-17 22:18 ` Rob Herring
2026-09-18 7:08 ` Alexey Charkov
2026-09-18 7:08 ` Alexey Charkov
2026-09-10 16:49 ` Ricardo Pardini
2026-09-10 16:49 ` Ricardo Pardini
2026-09-14 22:13 ` Srinivas Kandagatla [this message]
2026-09-14 22:13 ` (subset) " Srinivas Kandagatla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=178942400455.686568.7345103522777056647.b4-ty@kernel.org \
--to=srini@kernel.org \
--cc=alchark@flipper.net \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=finley.xiao@rock-chips.com \
--cc=gregkh@linuxfoundation.org \
--cc=heiko@sntech.de \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=michael@walle.cc \
--cc=miquel.raynal@bootlin.com \
--cc=robh@kernel.org \
--cc=stable@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.