* [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
@ 2026-09-20 13:06 Pengpeng Hou
2026-10-14 8:58 ` Pengpeng Hou
2026-11-01 22:16 ` patchwork-bot+linux-riscv
0 siblings, 2 replies; 3+ messages in thread
From: Pengpeng Hou @ 2026-09-20 13:06 UTC (permalink / raw)
To: radu, tglx
Cc: Pengpeng Hou, Charles Mirabile, linux-kernel, linux-riscv,
Lucas Zampieri, Paul Walmsley, Samuel Holland
__plic_toggle() builds a 32-bit interrupt enable mask using a signed
integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
which shifts a signed int into its sign bit.
Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
The resulting mask remains representable in u32 on both RV32 and RV64.
The issue was found by our static-analysis tool.
Fixes: 8237f8bc4f6e ("irqchip: add a SiFive PLIC driver")
Assisted-by: gpt 5
Signed-off-by: Pengpeng Hou <hppiscas@163.com>
---
Changes since v1: https://lore.kernel.org/r/20260825151000.1-plic-bit31-caplitmus-rv@iscas.ac.cn/
- Fix the Fixes tag as requested by Radu; keep the code change unchanged.
- Rebase on 518e5b794c06.
drivers/irqchip/irq-sifive-plic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 5b0dac1..d3d4187 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -108,7 +108,7 @@ static int plic_irq_set_type(struct irq_data *d, unsigned int type);
static void __plic_toggle(struct plic_handler *handler, int hwirq, int enable)
{
u32 __iomem *base = handler->enable_base;
- u32 hwirq_mask = 1 << (hwirq % 32);
+ u32 hwirq_mask = BIT(hwirq % 32);
int group = hwirq / 32;
u32 value;
base-commit: 518e5b794c06c0f0eb40df3e202274a66202c137
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
2026-09-20 13:06 [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask Pengpeng Hou
@ 2026-10-14 8:58 ` Pengpeng Hou
2026-11-01 22:16 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 3+ messages in thread
From: Pengpeng Hou @ 2026-10-14 8:58 UTC (permalink / raw)
To: radu, tglx
Cc: cmirabil, lzampier, pjw, samuel.holland, linux-kernel,
linux-riscv, hppiscas
Hi Radu, Thomas,
A brief follow-up on this v2. It corrects the Fixes tag as requested,
with the code change unchanged.
Please let me know whether it is queued or if any further changes are
needed.
Thanks,
Pengpeng
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
2026-09-20 13:06 [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask Pengpeng Hou
2026-10-14 8:58 ` Pengpeng Hou
@ 2026-11-01 22:16 ` patchwork-bot+linux-riscv
1 sibling, 0 replies; 3+ messages in thread
From: patchwork-bot+linux-riscv @ 2026-11-01 22:16 UTC (permalink / raw)
To: Pengpeng Hou
Cc: linux-riscv, radu, tglx, cmirabil, linux-kernel, lzampier, pjw,
samuel.holland
Hello:
This patch was applied to riscv/linux.git (fixes)
by Thomas Gleixner <tglx@kernel.org>:
On Sun, 20 Sep 2026 21:06:53 +0800 you wrote:
> __plic_toggle() builds a 32-bit interrupt enable mask using a signed
> integer literal. A valid interrupt selecting bit 31 evaluates 1 << 31,
> which shifts a signed int into its sign bit.
>
> Use BIT(), matching the equivalent mask construction in plic_irq_eoi().
> The resulting mask remains representable in u32 on both RV32 and RV64.
>
> [...]
Here is the summary with links:
- [v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask
https://git.kernel.org/riscv/c/0f214e5bbee5
You are awesome, thank you!
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2026-09-20 13:06 [PATCH v2] irqchip/sifive-plic: Avoid signed shift in interrupt enable mask Pengpeng Hou
2026-10-14 8:58 ` Pengpeng Hou
2026-11-01 22:16 ` patchwork-bot+linux-riscv
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