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From: "David E. Box" <david.e.box@linux.intel.com>
To: Thomas Witt <kernel@witt.link>,
	Bjorn Helgaas <helgaas@kernel.org>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Kuppuswamy Sathyanarayanan"
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	"Vidya Sagar" <vidyas@nvidia.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	"Kai-Heng Feng" <kai.heng.feng@canonical.com>,
	"Tasev Nikola" <tasev.stefanoska@skynet.be>,
	"Mark Enriquez" <enriquezmark36@gmail.com>,
	"Koba Ko" <koba.ko@canonical.com>,
	"Werner Sembach" <wse@tuxedocomputers.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"吳昊澄 Ricky" <ricky_wu@realtek.com>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v4] PCI/ASPM: Add back L1 PM Substate save and restore
Date: Fri, 03 Nov 2023 12:51:50 -0700	[thread overview]
Message-ID: <1de83120625d187ed2d3322cf46a27463eb8ab52.camel@linux.intel.com> (raw)
In-Reply-To: <923d8df0-1112-aca9-8289-c6e2457298cd@witt.link>

Hi Thomas,

I had updated the bugzilla with a request to run some commands to collect more
information from your system. Are you still able to work on this? Thanks.

https://bugzilla.kernel.org/show_bug.cgi?id=216877#c27

David


On Thu, 2023-10-05 at 17:57 +0200, Thomas Witt wrote:
> On 05/10/2023 17:30, Bjorn Helgaas wrote:
> > On Thu, Oct 05, 2023 at 12:02:58PM +0300, Mika Westerberg wrote:
> > > On Wed, Oct 04, 2023 at 05:23:24PM -0500, Bjorn Helgaas wrote:
> > > ...
> > 
> > > The thing with TUXEDO is that on Thomas's system with mem_sleep=deep
> > > this patch (without denylist) breaks the resume as he describes here:
> > > 
> > > https://bugzilla.kernel.org/show_bug.cgi?id=216877
> > > 
> > > However, on exact same TUXEDO system with the same firmwares Werner is
> > > not able to reproduce the issue with or without the patch. So I'm not
> > > sure what to do and that's why I added denylist that should take effect
> > > on Thomas' system when mem_sleep=deep is set but also work on the same
> > > system without it.
> > > 
> > > And since we have the denylist, I decided to add the ASUS there to avoid
> > > accidentally breaking those too.
> > > ...
> > 
> > > > I think there's still something we're missing.
> > > > 
> > > > We restore the LTR config before restoring DEVCTL2 (including the LTR
> > > > enable bit) and L1SS state.  I don't think we know the state of ASPM
> > > > and L1SS at that point, do we?  Do you think there could be an issue
> > > > there, too?
> > > 
> > > AFAICT LTR does not affect until it is explicitly enabled and I don't
> > > think many drivers actually program it (although we have some sort of
> > > API for it at least for Intel LPSS devices).
> > 
> > I couldn't find anything in the spec that suggests LTR should be an
> > issue.  I'm just grasping at straws here.
> > 
> > There's obviously *something* we're doing wrong because ASPM worked
> > before suspend, so we should be able to get it to work after resume.
> > 
> > Could we learn anything by dumping config space of the problem devices
> > before/after the suspend/resume and comparing them?
> > 
> > If we could figure out a difference between Werner's working TUXEDO
> > and Thomas' non-working TUXEDO, that might be a hint, too.
> > 
> > > If you have suggestions, I'm all open. If I understand you would like
> > > this to be done like:
> > > 
> > >    - Drop the denylist
> > >    - Add back the suspend/restore of L1SS
> > >    - Ask everyone in this thread to try it out
> > > 
> > > I can do that no problem but I guess that for the TUXEDO one (Thomas')
> > > it probably is going to fail still.
> > 
> > Right, without the denylist, I expect Thomas' TUXEDO to fail, but I
> > still hope we can figure out why.  If we just keep it on the denylist,
> > that system will suffer from more power consumption than necessary,
> > but only after suspend/resume.
> > 
> > A denylist seems like the absolute last resort.  In this case we don't
> > know about anything *wrong* with those platforms; all we know is that
> > our resume path doesn't work.  It's likely that it fails on other
> > platforms we haven't heard about, too.
> > 
> > Bjorn
> 
> The best guess from Mika and David was a firmware issue, but I run the 
> same Firmware revision as Werner. I even reflashed the Firmware, but 
> that did not change anything:
> 
> Quoting David Box:
>  > I agree that we should pursue an exception for your system. This is
>  > looking like a firmware bug. One thing we did notice in the turbostat
>  > results is your IRTL (Interrupt Response Time Limit) values are bogus:
>  >
>  > cpu6: MSR_PKGC3_IRTL: 0x0000884e (valid, 79872 ns)
>  > cpu6: MSR_PKGC6_IRTL: 0x00008000 (valid, 0 ns)
>  > cpu6: MSR_PKGC7_IRTL: 0x00008000 (valid, 0 ns)
>  > cpu6: MSR_PKGC8_IRTL: 0x00008000 (valid, 0 ns)
>  > cpu6: MSR_PKGC9_IRTL: 0x00008000 (valid, 0 ns)
>  > cpu6: MSR_PKGC10_IRTL: 0x00008000 (valid, 0 ns)
>  >
>  > This is despite the PKGC configuration register showing that all
>  > states are enabled:
>  >
>  > cpu6: MSR_PKG_CST_CONFIG_CONTROL: 0x1e008008 (UNdemote-C3, 
> UNdemote-C1, demote-
> C3, demote-C1, locked, pkg-cstate-limit=8 (unlimited))
>  >
>  > Firmware sets this.
> 
> Since I can't currently flash modified firmware on this computer, can 
> those values be overridden from userspace?
> 


      parent reply	other threads:[~2023-11-03 19:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-02  7:00 [PATCH v4] PCI/ASPM: Add back L1 PM Substate save and restore Mika Westerberg
2023-10-04 22:23 ` Bjorn Helgaas
2023-10-05  9:02   ` Mika Westerberg
2023-10-05 15:30     ` Bjorn Helgaas
2023-10-05 15:57       ` Thomas Witt
2023-10-05 17:22         ` Bjorn Helgaas
2023-10-09  8:34           ` Mika Westerberg
2023-10-09 16:34             ` Bjorn Helgaas
2023-10-09 22:57               ` David E. Box
2023-10-10  4:53               ` Mika Westerberg
2023-11-03 19:51         ` David E. Box [this message]

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