From: Gong Shuai <gsh517025@gmail.com>
To: fangyu.yu@linux.alibaba.com, gong.shuai@sanechips.com.cn
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
aou@eecs.berkeley.edu, guoren@kernel.org, iommu@lists.linux.dev,
jgg@nvidia.com, jgg@ziepe.ca, joro@8bytes.org,
kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pjw@kernel.org, robin.murphy@arm.com, tomasz.jeznach@linux.dev,
will@kernel.org, zong.li@sifive.com
Subject: Re: [RFC PATCH 1/3] iommu/riscv: Add guest IMSIC GPA mapping helpers
Date: Sat, 10 Oct 2026 23:33:39 +0800 [thread overview]
Message-ID: <1f9158d3-fb05-4100-9e7b-9519a62d089d@gmail.com> (raw)
In-Reply-To: <20261010111837.15424-1-fangyu.yu@linux.alibaba.com>
Hi Fangyu,
On 10/10/2026 7:18 PM, fangyu.yu@linux.alibaba.com wrote:
>>Hi Fangyu,
>>
>>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>>
>>> IOMMU implementations without the MSI_FLAT capability translate MSI
>>> writes through the second-stage page table, so IRQ forwarding on them
>>> will need guest IMSIC pages mapped into the second-stage domain.
>>>
>>> Add an xarray to the MSI table that tracks the HPA installed for each
>>> mapped guest IMSIC GPA, and two helpers for use with the MSI table lock
>>> held: riscv_iommu_msi_table_map_gpa() installs the initial 4 KiB
>>> mapping, and riscv_iommu_msi_table_replace_gpa_leaf() atomically swaps
>>> the leaf PTE's PFN when a vCPU's VS-file host page moves, rejecting
>>> leaves that do not map the expected old HPA.
>>>
>>> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>> ---
>>> drivers/iommu/riscv/iommu.c | 94 +++++++++++++++++++++++++++++++++++++
>>> drivers/iommu/riscv/iommu.h | 12 +++++
>>> 2 files changed, 106 insertions(+)
>>>
>>> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
>>> index e2e77469ea3c..48fc57d6409c 100644
>>> --- a/drivers/iommu/riscv/iommu.c
>>> +++ b/drivers/iommu/riscv/iommu.c
>>> @@ -24,6 +24,7 @@
>>> #include <linux/moduleparam.h>
>>> #include <linux/mutex.h>
>>> #include <linux/pci.h>
>>> +#include <linux/pgtable.h>
>>> #include <linux/generic_pt/iommu.h>
>>>
>>> #include "../dma-iommu.h"
>>> @@ -1217,6 +1218,92 @@ void riscv_iommu_msi_table_inval_all(struct riscv_iommu_msi_table *msi_table)
>>> riscv_iommu_iotlb_inval(domain, &gather);
>>> }
>>>
>>> +int riscv_iommu_msi_table_map_gpa(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t hpa)
>>> +{
>>> + struct riscv_iommu_domain *domain =
>>> + container_of(msi_table, struct riscv_iommu_domain, msi_table);
>>> + const int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
>>> +
>>> + /* Guest IMSIC GPA mapping only exists in second-stage translations. */
>>> + if (!domain->gscid)
>>> + return -EOPNOTSUPP;
>>> +
>>> + return iommu_map(&domain->domain, gpa, hpa, IMSIC_MMIO_PAGE_SZ, prot,
>>> + GFP_ATOMIC);
>>> +}
>>> +
>>> +int riscv_iommu_msi_table_replace_gpa_leaf(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t old_hpa,
>>> + phys_addr_t new_hpa)
>>
>>
>>This might fit better inside generic_pt rather than in the driver,
>>since it walks the page tables on its own and duplicates things
>>the library already owns, like the per-level index widths, the
>>x4 root size, and the PTE layout.
>>
>>I recently tried something very similar, and doing this inside
>>generic_pt turned out to be quite feasible (only a quick experiment,
>>not cleaned up for posting).
>>
>
> Hi Shuai,
>
> Thanks for the review. I agree the driver shouldn't carry format
> knowledge that belongs to the library, but I think this particular
> operation doesn't fit generic_pt.
>
> This is not a generic page-table operation. It is a special
> requirement of RISC-V IOMMU IRQ forwarding (irqbypass) on
> implementations without an MSI page table: the guest IMSIC GPA
> must be mapped into the second-stage domain, and when a vCPU's
> VS-file host page migrates, its leaf must be replaced atomically.
To be clear, I also meant updating the leaf in place,
not unmap + map.
> Because a device may write an MSI at any moment, unmap + map
> would fault. This operation is driven by the IRQ forwarding
> state machine, and because I don't see another generic_pt format
> sharing this flow, I think these helpers would be better placed
> outside generic_pt. I plan to move them into iommu-ir.c so the
> feature-scoped code stays together.
I'm fine with keeping it out of generic_pt. Respect your design.
Thanks,
Shuai
>
> Thanks,
> Fangyu
>
>>Thanks,
>>Shuai
WARNING: multiple messages have this Message-ID (diff)
From: Gong Shuai <gsh517025@gmail.com>
To: fangyu.yu@linux.alibaba.com, gong.shuai@sanechips.com.cn
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
aou@eecs.berkeley.edu, guoren@kernel.org, iommu@lists.linux.dev,
jgg@nvidia.com, jgg@ziepe.ca, joro@8bytes.org,
kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pjw@kernel.org, robin.murphy@arm.com, tomasz.jeznach@linux.dev,
will@kernel.org, zong.li@sifive.com
Subject: Re: [RFC PATCH 1/3] iommu/riscv: Add guest IMSIC GPA mapping helpers
Date: Sat, 10 Oct 2026 23:33:39 +0800 [thread overview]
Message-ID: <1f9158d3-fb05-4100-9e7b-9519a62d089d@gmail.com> (raw)
In-Reply-To: <20261010111837.15424-1-fangyu.yu@linux.alibaba.com>
Hi Fangyu,
On 10/10/2026 7:18 PM, fangyu.yu@linux.alibaba.com wrote:
>>Hi Fangyu,
>>
>>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>>
>>> IOMMU implementations without the MSI_FLAT capability translate MSI
>>> writes through the second-stage page table, so IRQ forwarding on them
>>> will need guest IMSIC pages mapped into the second-stage domain.
>>>
>>> Add an xarray to the MSI table that tracks the HPA installed for each
>>> mapped guest IMSIC GPA, and two helpers for use with the MSI table lock
>>> held: riscv_iommu_msi_table_map_gpa() installs the initial 4 KiB
>>> mapping, and riscv_iommu_msi_table_replace_gpa_leaf() atomically swaps
>>> the leaf PTE's PFN when a vCPU's VS-file host page moves, rejecting
>>> leaves that do not map the expected old HPA.
>>>
>>> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>> ---
>>> drivers/iommu/riscv/iommu.c | 94 +++++++++++++++++++++++++++++++++++++
>>> drivers/iommu/riscv/iommu.h | 12 +++++
>>> 2 files changed, 106 insertions(+)
>>>
>>> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
>>> index e2e77469ea3c..48fc57d6409c 100644
>>> --- a/drivers/iommu/riscv/iommu.c
>>> +++ b/drivers/iommu/riscv/iommu.c
>>> @@ -24,6 +24,7 @@
>>> #include <linux/moduleparam.h>
>>> #include <linux/mutex.h>
>>> #include <linux/pci.h>
>>> +#include <linux/pgtable.h>
>>> #include <linux/generic_pt/iommu.h>
>>>
>>> #include "../dma-iommu.h"
>>> @@ -1217,6 +1218,92 @@ void riscv_iommu_msi_table_inval_all(struct riscv_iommu_msi_table *msi_table)
>>> riscv_iommu_iotlb_inval(domain, &gather);
>>> }
>>>
>>> +int riscv_iommu_msi_table_map_gpa(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t hpa)
>>> +{
>>> + struct riscv_iommu_domain *domain =
>>> + container_of(msi_table, struct riscv_iommu_domain, msi_table);
>>> + const int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
>>> +
>>> + /* Guest IMSIC GPA mapping only exists in second-stage translations. */
>>> + if (!domain->gscid)
>>> + return -EOPNOTSUPP;
>>> +
>>> + return iommu_map(&domain->domain, gpa, hpa, IMSIC_MMIO_PAGE_SZ, prot,
>>> + GFP_ATOMIC);
>>> +}
>>> +
>>> +int riscv_iommu_msi_table_replace_gpa_leaf(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t old_hpa,
>>> + phys_addr_t new_hpa)
>>
>>
>>This might fit better inside generic_pt rather than in the driver,
>>since it walks the page tables on its own and duplicates things
>>the library already owns, like the per-level index widths, the
>>x4 root size, and the PTE layout.
>>
>>I recently tried something very similar, and doing this inside
>>generic_pt turned out to be quite feasible (only a quick experiment,
>>not cleaned up for posting).
>>
>
> Hi Shuai,
>
> Thanks for the review. I agree the driver shouldn't carry format
> knowledge that belongs to the library, but I think this particular
> operation doesn't fit generic_pt.
>
> This is not a generic page-table operation. It is a special
> requirement of RISC-V IOMMU IRQ forwarding (irqbypass) on
> implementations without an MSI page table: the guest IMSIC GPA
> must be mapped into the second-stage domain, and when a vCPU's
> VS-file host page migrates, its leaf must be replaced atomically.
To be clear, I also meant updating the leaf in place,
not unmap + map.
> Because a device may write an MSI at any moment, unmap + map
> would fault. This operation is driven by the IRQ forwarding
> state machine, and because I don't see another generic_pt format
> sharing this flow, I think these helpers would be better placed
> outside generic_pt. I plan to move them into iommu-ir.c so the
> feature-scoped code stays together.
I'm fine with keeping it out of generic_pt. Respect your design.
Thanks,
Shuai
>
> Thanks,
> Fangyu
>
>>Thanks,
>>Shuai
--
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Gong Shuai <gsh517025@gmail.com>
To: fangyu.yu@linux.alibaba.com, gong.shuai@sanechips.com.cn
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
aou@eecs.berkeley.edu, guoren@kernel.org, iommu@lists.linux.dev,
jgg@nvidia.com, jgg@ziepe.ca, joro@8bytes.org,
kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pjw@kernel.org, robin.murphy@arm.com, tomasz.jeznach@linux.dev,
will@kernel.org, zong.li@sifive.com
Subject: Re: [RFC PATCH 1/3] iommu/riscv: Add guest IMSIC GPA mapping helpers
Date: Sat, 10 Oct 2026 23:33:39 +0800 [thread overview]
Message-ID: <1f9158d3-fb05-4100-9e7b-9519a62d089d@gmail.com> (raw)
In-Reply-To: <20261010111837.15424-1-fangyu.yu@linux.alibaba.com>
Hi Fangyu,
On 10/10/2026 7:18 PM, fangyu.yu@linux.alibaba.com wrote:
>>Hi Fangyu,
>>
>>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>>
>>> IOMMU implementations without the MSI_FLAT capability translate MSI
>>> writes through the second-stage page table, so IRQ forwarding on them
>>> will need guest IMSIC pages mapped into the second-stage domain.
>>>
>>> Add an xarray to the MSI table that tracks the HPA installed for each
>>> mapped guest IMSIC GPA, and two helpers for use with the MSI table lock
>>> held: riscv_iommu_msi_table_map_gpa() installs the initial 4 KiB
>>> mapping, and riscv_iommu_msi_table_replace_gpa_leaf() atomically swaps
>>> the leaf PTE's PFN when a vCPU's VS-file host page moves, rejecting
>>> leaves that do not map the expected old HPA.
>>>
>>> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>> ---
>>> drivers/iommu/riscv/iommu.c | 94 +++++++++++++++++++++++++++++++++++++
>>> drivers/iommu/riscv/iommu.h | 12 +++++
>>> 2 files changed, 106 insertions(+)
>>>
>>> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
>>> index e2e77469ea3c..48fc57d6409c 100644
>>> --- a/drivers/iommu/riscv/iommu.c
>>> +++ b/drivers/iommu/riscv/iommu.c
>>> @@ -24,6 +24,7 @@
>>> #include <linux/moduleparam.h>
>>> #include <linux/mutex.h>
>>> #include <linux/pci.h>
>>> +#include <linux/pgtable.h>
>>> #include <linux/generic_pt/iommu.h>
>>>
>>> #include "../dma-iommu.h"
>>> @@ -1217,6 +1218,92 @@ void riscv_iommu_msi_table_inval_all(struct riscv_iommu_msi_table *msi_table)
>>> riscv_iommu_iotlb_inval(domain, &gather);
>>> }
>>>
>>> +int riscv_iommu_msi_table_map_gpa(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t hpa)
>>> +{
>>> + struct riscv_iommu_domain *domain =
>>> + container_of(msi_table, struct riscv_iommu_domain, msi_table);
>>> + const int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
>>> +
>>> + /* Guest IMSIC GPA mapping only exists in second-stage translations. */
>>> + if (!domain->gscid)
>>> + return -EOPNOTSUPP;
>>> +
>>> + return iommu_map(&domain->domain, gpa, hpa, IMSIC_MMIO_PAGE_SZ, prot,
>>> + GFP_ATOMIC);
>>> +}
>>> +
>>> +int riscv_iommu_msi_table_replace_gpa_leaf(struct riscv_iommu_msi_table *msi_table,
>>> + dma_addr_t gpa, phys_addr_t old_hpa,
>>> + phys_addr_t new_hpa)
>>
>>
>>This might fit better inside generic_pt rather than in the driver,
>>since it walks the page tables on its own and duplicates things
>>the library already owns, like the per-level index widths, the
>>x4 root size, and the PTE layout.
>>
>>I recently tried something very similar, and doing this inside
>>generic_pt turned out to be quite feasible (only a quick experiment,
>>not cleaned up for posting).
>>
>
> Hi Shuai,
>
> Thanks for the review. I agree the driver shouldn't carry format
> knowledge that belongs to the library, but I think this particular
> operation doesn't fit generic_pt.
>
> This is not a generic page-table operation. It is a special
> requirement of RISC-V IOMMU IRQ forwarding (irqbypass) on
> implementations without an MSI page table: the guest IMSIC GPA
> must be mapped into the second-stage domain, and when a vCPU's
> VS-file host page migrates, its leaf must be replaced atomically.
To be clear, I also meant updating the leaf in place,
not unmap + map.
> Because a device may write an MSI at any moment, unmap + map
> would fault. This operation is driven by the IRQ forwarding
> state machine, and because I don't see another generic_pt format
> sharing this flow, I think these helpers would be better placed
> outside generic_pt. I plan to move them into iommu-ir.c so the
> feature-scoped code stays together.
I'm fine with keeping it out of generic_pt. Respect your design.
Thanks,
Shuai
>
> Thanks,
> Fangyu
>
>>Thanks,
>>Shuai
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-10-10 15:33 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-08 13:59 [RFC PATCH 0/3] iommu/riscv: Add irqbypass support without MSI page table fangyu.yu
2026-10-08 13:59 ` fangyu.yu
2026-10-08 13:59 ` fangyu.yu
2026-10-08 13:59 ` [RFC PATCH 1/3] iommu/riscv: Add guest IMSIC GPA mapping helpers fangyu.yu
2026-10-08 13:59 ` fangyu.yu
2026-10-08 13:59 ` fangyu.yu
2026-10-09 8:50 ` Gong Shuai
2026-10-09 8:50 ` Gong Shuai
2026-10-09 8:50 ` Gong Shuai
2026-10-10 11:18 ` fangyu.yu
2026-10-10 11:18 ` fangyu.yu
2026-10-10 11:18 ` fangyu.yu
2026-10-10 15:33 ` Gong Shuai [this message]
2026-10-10 15:33 ` Gong Shuai
2026-10-10 15:33 ` Gong Shuai
2026-10-11 13:51 ` Jason Gunthorpe
2026-10-11 13:51 ` Jason Gunthorpe
2026-10-11 13:51 ` Jason Gunthorpe
2026-10-12 9:49 ` fangyu.yu
2026-10-12 9:49 ` fangyu.yu
2026-10-12 9:49 ` fangyu.yu
2026-10-08 14:00 ` [RFC PATCH 2/3] iommu/riscv: Extract IRQ forwarding payload validation fangyu.yu
2026-10-08 14:00 ` fangyu.yu
2026-10-08 14:00 ` fangyu.yu
2026-10-08 14:00 ` [RFC PATCH 3/3] iommu/riscv: Support IRQ forwarding without MSI page tables fangyu.yu
2026-10-08 14:00 ` fangyu.yu
2026-10-08 14:00 ` fangyu.yu
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