From: Dave Jones <davej@codemonkey.org.uk>
To: Andi Kleen <ak@muc.de>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>, linux-kernel@vger.kernel.org
Subject: Re: cacheline size detection code in 2.5.66
Date: Tue, 25 Mar 2003 12:43:33 +0000 [thread overview]
Message-ID: <20030325124333.GB28451@suse.de> (raw)
In-Reply-To: <20030325121527.GA29965@averell>
On Tue, Mar 25, 2003 at 01:15:27PM +0100, Andi Kleen wrote:
> > BTW, the "AMD Processor Recognition Application Note" calls bit 19
> > "Multiprocessing Capable". ;-)
> Hmm, yes it's broken. 19 is CFLUSH in the 8000_0001 extended CPUID word,
> but not in index 0000_0001.
On K8 maybe, but on K7, its correct as it stands. bit 19 of 80000001
is the MP capability bit. As K7 never had clflush, its not defined
there.
> Broken in i386 too.
I don't see anything broken there. The K7 / K8 feature flags are not
bit for bit compatible though iirc (can't find my K8 cpuid manuals right now).
Dave
next prev parent reply other threads:[~2003-03-25 12:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-03-25 7:15 cacheline size detection code in 2.5.66 Andi Kleen
2003-03-25 11:33 ` Ivan Kokshaysky
2003-03-25 12:15 ` Andi Kleen
2003-03-25 12:43 ` Dave Jones [this message]
2003-03-25 13:35 ` Andi Kleen
2003-03-25 14:39 ` Ivan Kokshaysky
2003-03-25 16:43 ` Dave Jones
2003-03-25 11:52 ` Dave Jones
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