From: Ralf Baechle <ralf@linux-mips.org>
To: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
Cc: linux-mips@linux-mips.org
Subject: Re: simulate_ll and simulate_sc move to do_cpu from do_ri
Date: Fri, 18 Apr 2003 20:45:53 +0200 [thread overview]
Message-ID: <20030418204553.A29634@linux-mips.org> (raw)
In-Reply-To: <20030418181748.57f7789a.yuasa@hh.iij4u.or.jp>; from yuasa@hh.iij4u.or.jp on Fri, Apr 18, 2003 at 06:17:48PM +0900
On Fri, Apr 18, 2003 at 06:17:48PM +0900, Yoichi Yuasa wrote:
> Why did you move simulate_ll and simulate_sc to do_cpu from do_ri?
> NEC VR4100 series need simulate_ll and simulate_sc in do_ri.
As the CVS comment said ll is using the opcode for lwc0 and sc the opcode
for swc0 so the expected behaviour of an attempt to execute ll or sc on a
ll/sc-less processor is throwing a coprocessor unusable exception, not
reserved exception.
So if the VR4100 series is indeed throwing RI exceptions then this processor
is plain broken. Will fix but not without cursing into NEC's direction.
Grr...
Ralf
next prev parent reply other threads:[~2003-04-18 18:46 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-18 9:17 simulate_ll and simulate_sc move to do_cpu from do_ri Yoichi Yuasa
2003-04-18 18:45 ` Ralf Baechle [this message]
2003-04-21 10:00 ` Yoichi Yuasa
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