* simulate_ll and simulate_sc move to do_cpu from do_ri
@ 2003-04-18 9:17 Yoichi Yuasa
2003-04-18 18:45 ` Ralf Baechle
0 siblings, 1 reply; 3+ messages in thread
From: Yoichi Yuasa @ 2003-04-18 9:17 UTC (permalink / raw)
To: ralf; +Cc: yuasa, linux-mips
Hi Ralf,
Why did you move simulate_ll and simulate_sc to do_cpu from do_ri?
NEC VR4100 series need simulate_ll and simulate_sc in do_ri.
Yoichi
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: simulate_ll and simulate_sc move to do_cpu from do_ri
2003-04-18 9:17 simulate_ll and simulate_sc move to do_cpu from do_ri Yoichi Yuasa
@ 2003-04-18 18:45 ` Ralf Baechle
2003-04-21 10:00 ` Yoichi Yuasa
0 siblings, 1 reply; 3+ messages in thread
From: Ralf Baechle @ 2003-04-18 18:45 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: linux-mips
On Fri, Apr 18, 2003 at 06:17:48PM +0900, Yoichi Yuasa wrote:
> Why did you move simulate_ll and simulate_sc to do_cpu from do_ri?
> NEC VR4100 series need simulate_ll and simulate_sc in do_ri.
As the CVS comment said ll is using the opcode for lwc0 and sc the opcode
for swc0 so the expected behaviour of an attempt to execute ll or sc on a
ll/sc-less processor is throwing a coprocessor unusable exception, not
reserved exception.
So if the VR4100 series is indeed throwing RI exceptions then this processor
is plain broken. Will fix but not without cursing into NEC's direction.
Grr...
Ralf
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: simulate_ll and simulate_sc move to do_cpu from do_ri
2003-04-18 18:45 ` Ralf Baechle
@ 2003-04-21 10:00 ` Yoichi Yuasa
0 siblings, 0 replies; 3+ messages in thread
From: Yoichi Yuasa @ 2003-04-21 10:00 UTC (permalink / raw)
To: Ralf Baechle; +Cc: yuasa, linux-mips
[-- Attachment #1: Type: text/plain, Size: 823 bytes --]
Hi Ralf,
On Fri, 18 Apr 2003 20:45:53 +0200
Ralf Baechle <ralf@linux-mips.org> wrote:
> On Fri, Apr 18, 2003 at 06:17:48PM +0900, Yoichi Yuasa wrote:
>
> > Why did you move simulate_ll and simulate_sc to do_cpu from do_ri?
> > NEC VR4100 series need simulate_ll and simulate_sc in do_ri.
>
> As the CVS comment said ll is using the opcode for lwc0 and sc the opcode
> for swc0 so the expected behaviour of an attempt to execute ll or sc on a
> ll/sc-less processor is throwing a coprocessor unusable exception, not
> reserved exception.
>
> So if the VR4100 series is indeed throwing RI exceptions then this processor
> is plain broken. Will fix but not without cursing into NEC's direction.
>
> Grr...
In addition, the attached patches are still required for NEC VR4100 series.
Please apply these patches.
Yoichi
[-- Attachment #2: simulate_llsc-v24.diff --]
[-- Type: text/plain, Size: 1784 bytes --]
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/cpu-probe.c linux/arch/mips/kernel/cpu-probe.c
--- linux.orig/arch/mips/kernel/cpu-probe.c Thu Apr 17 12:30:25 2003
+++ linux/arch/mips/kernel/cpu-probe.c Mon Apr 21 12:30:05 2003
@@ -244,7 +244,7 @@
break;
}
current_cpu_data.isa_level = MIPS_CPU_ISA_III;
- current_cpu_data.options = R4K_OPTS | MIPS_CPU_LLSC;
+ current_cpu_data.options = R4K_OPTS;
current_cpu_data.tlbsize = 32;
break;
case PRID_IMP_R4300:
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/proc.c linux/arch/mips/kernel/proc.c
--- linux.orig/arch/mips/kernel/proc.c Wed Apr 16 12:51:18 2003
+++ linux/arch/mips/kernel/proc.c Mon Apr 21 12:24:00 2003
@@ -71,6 +71,10 @@
[CPU_VR4181A] "NEC VR4181A"
};
+#ifndef CONFIG_CPU_HAS_LLSC
+extern unsigned long ll_ops;
+extern unsigned long sc_ops;
+#endif
static int show_cpuinfo(struct seq_file *m, void *v)
{
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux.orig/arch/mips/kernel/traps.c Mon Apr 21 10:56:54 2003
+++ linux/arch/mips/kernel/traps.c Mon Apr 21 12:39:25 2003
@@ -405,8 +405,8 @@
* For now we don't have a mechanism to dump these variables to
* /procfs anymore ...
*/
-static unsigned long ll_ops;
-static unsigned long sc_ops;
+unsigned long ll_ops;
+unsigned long sc_ops;
#endif
static struct task_struct *ll_task = NULL;
@@ -521,11 +521,11 @@
if ((opcode & OPCODE) == LL) {
simulate_ll(regs, opcode);
- return;
+ return 0;
}
if ((opcode & OPCODE) == SC) {
simulate_sc(regs, opcode);
- return;
+ return 0;
}
}
[-- Attachment #3: simulate_llsc-v25.diff --]
[-- Type: text/plain, Size: 1784 bytes --]
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/cpu-probe.c linux/arch/mips/kernel/cpu-probe.c
--- linux.orig/arch/mips/kernel/cpu-probe.c Thu Apr 17 12:31:41 2003
+++ linux/arch/mips/kernel/cpu-probe.c Mon Apr 21 18:28:51 2003
@@ -244,7 +244,7 @@
break;
}
current_cpu_data.isa_level = MIPS_CPU_ISA_III;
- current_cpu_data.options = R4K_OPTS | MIPS_CPU_LLSC;
+ current_cpu_data.options = R4K_OPTS;
current_cpu_data.tlbsize = 32;
break;
case PRID_IMP_R4300:
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/proc.c linux/arch/mips/kernel/proc.c
--- linux.orig/arch/mips/kernel/proc.c Wed Apr 16 12:52:27 2003
+++ linux/arch/mips/kernel/proc.c Mon Apr 21 18:29:29 2003
@@ -71,6 +71,10 @@
[CPU_VR4181A] "NEC VR4181A"
};
+#ifndef CONFIG_CPU_HAS_LLSC
+extern unsigned long ll_ops;
+extern unsigned long sc_ops;
+#endif
static int show_cpuinfo(struct seq_file *m, void *v)
{
diff -aruN --exclude=CVS --exclude=.cvsignore linux.orig/arch/mips/kernel/traps.c linux/arch/mips/kernel/traps.c
--- linux.orig/arch/mips/kernel/traps.c Mon Apr 21 10:59:49 2003
+++ linux/arch/mips/kernel/traps.c Mon Apr 21 18:30:15 2003
@@ -400,8 +400,8 @@
* For now we don't have a mechanism to dump these variables to
* /procfs anymore ...
*/
-static unsigned long ll_ops;
-static unsigned long sc_ops;
+unsigned long ll_ops;
+unsigned long sc_ops;
#endif
static struct task_struct *ll_task = NULL;
@@ -516,11 +516,11 @@
if ((opcode & OPCODE) == LL) {
simulate_ll(regs, opcode);
- return;
+ return 0;
}
if ((opcode & OPCODE) == SC) {
simulate_sc(regs, opcode);
- return;
+ return 0;
}
}
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2003-04-21 10:00 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2003-04-18 9:17 simulate_ll and simulate_sc move to do_cpu from do_ri Yoichi Yuasa
2003-04-18 18:45 ` Ralf Baechle
2003-04-21 10:00 ` Yoichi Yuasa
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