From: Ralf Baechle <ralf@linux-mips.org>
To: Emmanuel Michon <em@realmagic.fr>
Cc: linux-mips@linux-mips.org
Subject: Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithmetics?
Date: Thu, 27 May 2004 17:59:47 +0200 [thread overview]
Message-ID: <20040527155947.GA4154@linux-mips.org> (raw)
In-Reply-To: <1085668313.20233.1249.camel@avalon.france.sdesigns.com>
On Thu, May 27, 2004 at 04:31:53PM +0200, Emmanuel Michon wrote:
> On 64bit you substract 1ULL<<32
>
> Substracting 1 is enough for it to be algorithmically correct even on
> 64bit
> Do you accept a patch with the version for CONFIG_LLSC = y using a
> substraction by 1?
This sounds wrong - the current algorithm is manipulating two 32-bit
variables held in a single register. If you change the algorithm like
this you will manipulate the wrong variable. Anyway, I don't see why the
code fails for you. With CONFIG_CPU_HAS_LLSC set and CONFIG_CPU_HAS_LLDSCD
disabled it should just work for you.
The suggestion in my prevous mail was meant for a rewrite along the lines
of for example ppc64 - an algorithm that's mostly C and almost portable
even.
Ralf
next prev parent reply other threads:[~2004-05-27 16:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-26 16:35 down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithmetics? Emmanuel Michon
2004-05-26 16:59 ` down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics? Kevin D. Kissell
2004-05-26 16:59 ` Kevin D. Kissell
2004-05-26 17:03 ` Emmanuel Michon
2004-05-26 17:16 ` Maciej W. Rozycki
2004-05-26 17:27 ` Emmanuel Michon
2004-05-26 17:40 ` Maciej W. Rozycki
2004-05-26 20:33 ` down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithmetics? Ralf Baechle
2004-05-27 14:31 ` Emmanuel Michon
2004-05-27 15:59 ` Ralf Baechle [this message]
2004-05-28 0:35 ` Ralf Baechle
2004-05-28 9:36 ` Thiemo Seufer
2004-05-28 9:57 ` Ralf Baechle
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