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* [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
@ 2004-08-27 16:37 Kyle McMartin
       [not found] ` <1093625820.2010.26.camel@mulgrave>
  2004-08-28 22:15 ` Kyle McMartin
  0 siblings, 2 replies; 12+ messages in thread
From: Kyle McMartin @ 2004-08-27 16:37 UTC (permalink / raw)
  To: parisc-linux

Not knowing anything about how 2.4 works, I hope this is enough,
ping me if it isn't, and I'll take another look.

	Regards,
		Kyle

arch/parisc/lib/locks.c         |    6 ++++++
include/asm-parisc/atomic.h     |   10 ++++++++--
include/asm-parisc/spinlock_t.h |   19 +++++++++++--------
3 files changed, 25 insertions(+), 10 deletions(-)


Index: arch/parisc/lib/locks.c
===================================================================
RCS file: /var/cvs/linux-2.4/arch/parisc/lib/locks.c,v
retrieving revision 1.1
diff -u -r1.1 locks.c
--- arch/parisc/lib/locks.c	16 Nov 2002 07:28:08 -0000	1.1
+++ arch/parisc/lib/locks.c	27 Aug 2004 16:12:50 -0000
@@ -22,6 +22,7 @@
 
 void spin_lock(spinlock_t *lock)
 {
+	mb();
 	int cpu = smp_processor_id();
 	unsigned int stuck = INIT_STUCK;
 	while (!__spin_trylock(lock)) {
@@ -39,19 +40,23 @@
 	}
 	lock->owner_pc = (unsigned long)__builtin_return_address(0);
 	lock->owner_cpu = cpu;
+	mb();
 }
 
 int spin_trylock(spinlock_t *lock)
 {
+	mb();
 	if (!__spin_trylock(lock))
 		return 0;
 	lock->owner_cpu = smp_processor_id(); 
 	lock->owner_pc = (unsigned long)__builtin_return_address(0);
+	mb();
 	return 1;
 }
 
 void spin_unlock(spinlock_t *lp)
 {
+	mb();
   	if ( lp->lock )
 		printk("spin_unlock(%p): no lock cpu %d curr PC %p %s/%d\n",
 		       lp, smp_processor_id(), __builtin_return_address(0),
@@ -63,6 +68,7 @@
 	lp->owner_pc = lp->owner_cpu = 0;
 	wmb();
 	lp->lock = 1;
+	mb();
 }
 
 #endif
Index: include/asm-parisc/atomic.h
===================================================================
RCS file: /var/cvs/linux-2.4/include/asm-parisc/atomic.h,v
retrieving revision 1.10
diff -u -r1.10 atomic.h
--- include/asm-parisc/atomic.h	13 Sep 2002 21:43:37 -0000	1.10
+++ include/asm-parisc/atomic.h	27 Aug 2004 16:13:00 -0000
@@ -30,8 +30,14 @@
  *
  * XXX REVISIT these could be renamed and moved to spinlock_t.h as well
  */
-#define SPIN_LOCK(x)	do { while(__ldcw(&(x)->lock) == 0); } while(0)
-#define SPIN_UNLOCK(x)  do { (x)->lock = 1; } while(0)
+#define SPIN_LOCK(x)    mb();     \
+                        do { while(__ldcw(&(x)->lock) == 0); } \
+                        while(0); \
+                        mb()
+#define SPIN_UNLOCK(x)  mb();     \
+                        do { (x)->lock = 1; } \
+                        while(0); \
+                        mb()
 
 #else	/* CONFIG_SMP */
 
Index: include/asm-parisc/spinlock_t.h
===================================================================
RCS file: /var/cvs/linux-2.4/include/asm-parisc/spinlock_t.h,v
retrieving revision 1.5
diff -u -r1.5 spinlock_t.h
--- include/asm-parisc/spinlock_t.h	7 May 2003 17:20:29 -0000	1.5
+++ include/asm-parisc/spinlock_t.h	27 Aug 2004 16:13:00 -0000
@@ -68,15 +68,18 @@
  * Writing this with asm also ensures that the unlock doesn't
  * get reordered
  */
-#define spin_unlock(x) \
-	__asm__ __volatile__ ("stw,ma  %%sp,0(%0)" : : "r" (&(x)->lock) : "memory" )
+#define spin_unlock(x) do { mb(); \
+ 	__asm__ __volatile__ ("stw,ma  %%sp,0(%0)" : : "r" (&(x)->lock) : "memory" ); \
+        mb(); } while(0)
+
+#define spin_unlock_wait(x) mb(); \
+ do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0); \
+ mb()
 
-#define spin_unlock_wait(x)     do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0)
-
-#define spin_lock(x) do { \
+#define spin_lock(x) do { mb(); \
 	while (__ldcw (&(x)->lock) == 0) \
 		while ((x)->lock == 0) ; \
-} while (0)
+        mb(); } while (0)
 
 #else
 
@@ -85,12 +88,12 @@
 
 /* Define 6 spinlock primitives that don't depend on anything else. */
 
-#define spin_lock_init(x)       do { (x)->lock = 1; (x)->owner_cpu = 0; (x)->owner_pc = 0; } while(0)
+#define spin_lock_init(x)       mb(); do { (x)->lock = 1; (x)->owner_cpu = 0; (x)->owner_pc = 0; } while(0); mb()
 #define spin_is_locked(x)       ((x)->lock == 0)
 void spin_lock(spinlock_t *lock);
 int spin_trylock(spinlock_t *lock);
 void spin_unlock(spinlock_t *lock);
-#define spin_unlock_wait(x)     do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0)
+#define spin_unlock_wait(x)     mb(); do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0); mb()
 
 #endif
 
-- 
Kyle McMartin
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
       [not found]   ` <20040827170342.GD25975@baldric.uwo.ca>
@ 2004-08-28 16:57     ` Joel Soete
  2004-08-28 17:07       ` Kyle McMartin
  0 siblings, 1 reply; 12+ messages in thread
From: Joel Soete @ 2004-08-28 16:57 UTC (permalink / raw)
  To: Carlos O'Donell; +Cc: James Bottomley, Kyle McMartin, PARISC list



Carlos O'Donell wrote:
>  On Fri, 2004-08-27 at 12:37, Kyle McMartin wrote:
[...]

>>
>>if (<some statement>)
>>	spin_lock_init(x);
> 
> 
> I always recommend macros should be encased with "({ ... })" which give
> you a new scope for variable declarations aswell.
> 

Do I well undesrtand: replace e.g.
#define SPIN_LOCK_IRQSAVE(l,f) do {            \
        spinlock_t *s = ATOMIC_HASH(l);                 \
        local_irq_save(f);                              \
        spin_lock(s);                                   \
} while(0)

by
#define SPIN_LOCK_IRQSAVE(l,f) ({            \
        spinlock_t *s = ATOMIC_HASH(l);                 \
        local_irq_save(f);                              \
        spin_lock(s);                                   \
})

I admit that I never find the right way to choose between those 2 forms?

TIA,
	Joel
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http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-28 16:57     ` Joel Soete
@ 2004-08-28 17:07       ` Kyle McMartin
  0 siblings, 0 replies; 12+ messages in thread
From: Kyle McMartin @ 2004-08-28 17:07 UTC (permalink / raw)
  To: Joel Soete; +Cc: parisc-linux

On Sat, Aug 28, 2004 at 04:57:57PM +0000, Joel Soete wrote:
> #define SPIN_LOCK_IRQSAVE(l,f) ({            \
>        spinlock_t *s = ATOMIC_HASH(l);                 \
>        local_irq_save(f);                              \
>        spin_lock(s);                                   \
> })
> 
This form allows you to use SPIN_LOCK_IRQSAVE as an rvalue, as in

#define foo(a) ({ \
	int _b = 10;
	_b += a;
	_b;
})

baz = foo(10);
baz == 20;

Cheers,
-- 
Kyle McMartin
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-27 16:37 [parisc-linux] memory barriers, spinlocks, debuglocks, oh my Kyle McMartin
       [not found] ` <1093625820.2010.26.camel@mulgrave>
@ 2004-08-28 22:15 ` Kyle McMartin
  2004-08-29 16:11   ` Joel Soete
  1 sibling, 1 reply; 12+ messages in thread
From: Kyle McMartin @ 2004-08-28 22:15 UTC (permalink / raw)
  To: parisc-linux

Once more unto the brink,

Commitable?

Index: arch/parisc/lib/locks.c
===================================================================
RCS file: /var/cvs/linux-2.4/arch/parisc/lib/locks.c,v
retrieving revision 1.1
diff -u -r1.1 locks.c
--- arch/parisc/lib/locks.c	16 Nov 2002 07:28:08 -0000	1.1
+++ arch/parisc/lib/locks.c	28 Aug 2004 18:55:59 -0000
@@ -24,6 +24,8 @@
 {
 	int cpu = smp_processor_id();
 	unsigned int stuck = INIT_STUCK;
+
+	mb();
 	while (!__spin_trylock(lock)) {
 		while ((unsigned volatile long)lock->lock == 0) {
 			if (!--stuck) {
@@ -39,19 +41,23 @@
 	}
 	lock->owner_pc = (unsigned long)__builtin_return_address(0);
 	lock->owner_cpu = cpu;
+	mb();
 }
 
 int spin_trylock(spinlock_t *lock)
 {
+	mb();
 	if (!__spin_trylock(lock))
 		return 0;
 	lock->owner_cpu = smp_processor_id(); 
 	lock->owner_pc = (unsigned long)__builtin_return_address(0);
+	mb();
 	return 1;
 }
 
 void spin_unlock(spinlock_t *lp)
 {
+	mb();
   	if ( lp->lock )
 		printk("spin_unlock(%p): no lock cpu %d curr PC %p %s/%d\n",
 		       lp, smp_processor_id(), __builtin_return_address(0),
@@ -63,6 +69,7 @@
 	lp->owner_pc = lp->owner_cpu = 0;
 	wmb();
 	lp->lock = 1;
+	mb();
 }
 
 #endif
Index: include/asm-parisc/atomic.h
===================================================================
RCS file: /var/cvs/linux-2.4/include/asm-parisc/atomic.h,v
retrieving revision 1.10
diff -u -r1.10 atomic.h
--- include/asm-parisc/atomic.h	13 Sep 2002 21:43:37 -0000	1.10
+++ include/asm-parisc/atomic.h	28 Aug 2004 18:56:09 -0000
@@ -30,8 +30,11 @@
  *
  * XXX REVISIT these could be renamed and moved to spinlock_t.h as well
  */
-#define SPIN_LOCK(x)	do { while(__ldcw(&(x)->lock) == 0); } while(0)
-#define SPIN_UNLOCK(x)  do { (x)->lock = 1; } while(0)
+#define SPIN_LOCK(x) do { while(__ldcw(&(x)->lock) == 0); } while(0)
+#define SPIN_UNLOCK(x) do {  \
+                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
+                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
+                       } while (0)
 
 #else	/* CONFIG_SMP */
 
Index: include/asm-parisc/spinlock_t.h
===================================================================
RCS file: /var/cvs/linux-2.4/include/asm-parisc/spinlock_t.h,v
retrieving revision 1.5
diff -u -r1.5 spinlock_t.h
--- include/asm-parisc/spinlock_t.h	7 May 2003 17:20:29 -0000	1.5
+++ include/asm-parisc/spinlock_t.h	28 Aug 2004 18:56:09 -0000
@@ -6,29 +6,12 @@
  * Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked
  * since it only has load-and-zero.
  */
-#ifdef CONFIG_PA20
-/* 
-> From: "Jim Hull" <jim.hull of hp.com>
-> Delivery-date: Wed, 29 Jan 2003 13:57:05 -0500
-> I've attached a summary of the change, but basically, for PA 2.0, as
-> long as the ",CO" (coherent operation) completer is specified, then the
-> 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
-> they only require "natural" alignment (4-byte for ldcw, 8-byte for
-> ldcd).
-*/
-
 #define __ldcw(a) ({ \
 	unsigned __ret; \
-	__asm__ __volatile__("ldcw,co 0(%1),%0" : "=r" (__ret) : "r" (a)); \
+	__asm__ __volatile__("ldcw,ma 0(%1),%0" \
+                             : "=r" (__ret) : "r" (a) : "memory"); \
 	__ret; \
 })
-#else
-#define __ldcw(a) ({ \
-	unsigned __ret; \
-	__asm__ __volatile__("ldcw 0(%1),%0" : "=r" (__ret) : "r" (a)); \
-	__ret; \
-})
-#endif
 
 /*
  * Your basic SMP spinlocks, allowing only a single CPU anywhere
@@ -68,15 +51,17 @@
  * Writing this with asm also ensures that the unlock doesn't
  * get reordered
  */
-#define spin_unlock(x) \
-	__asm__ __volatile__ ("stw,ma  %%sp,0(%0)" : : "r" (&(x)->lock) : "memory" )
+#define spin_unlock(x) do { __asm__ __volatile__ ("stw,ma  %%sp,0(%0)" \
+                                    : : "r" (&(x)->lock) : "memory" ); \
+                       } while(0)
 
-#define spin_unlock_wait(x)     do { barrier(); } while(((volatile spinlock_t *)(x))->lock == 0)
+#define spin_unlock_wait(x) do { barrier(); } \
+                            while(((volatile spinlock_t *)(x))->lock == 0)
 
-#define spin_lock(x) do { \
+#define spin_lock(x) do {                \
 	while (__ldcw (&(x)->lock) == 0) \
 		while ((x)->lock == 0) ; \
-} while (0)
+        } while (0)
 
 #else
 
-- 
Kyle McMartin
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-28 22:15 ` Kyle McMartin
@ 2004-08-29 16:11   ` Joel Soete
  2004-08-29 16:13     ` Kyle McMartin
                       ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Joel Soete @ 2004-08-29 16:11 UTC (permalink / raw)
  To: Kyle McMartin; +Cc: parisc-linux



Kyle McMartin wrote:
> Once more unto the brink,
> 
> Commitable?
> 
mmm,

[...]

> Index: include/asm-parisc/atomic.h
> ===================================================================
> RCS file: /var/cvs/linux-2.4/include/asm-parisc/atomic.h,v
> retrieving revision 1.10
> diff -u -r1.10 atomic.h
> --- include/asm-parisc/atomic.h	13 Sep 2002 21:43:37 -0000	1.10
> +++ include/asm-parisc/atomic.h	28 Aug 2004 18:56:09 -0000
> @@ -30,8 +30,11 @@
>   *
>   * XXX REVISIT these could be renamed and moved to spinlock_t.h as well
>   */
> -#define SPIN_LOCK(x)	do { while(__ldcw(&(x)->lock) == 0); } while(0)
> -#define SPIN_UNLOCK(x)  do { (x)->lock = 1; } while(0)
> +#define SPIN_LOCK(x) do { while(__ldcw(&(x)->lock) == 0); } while(0)
> +#define SPIN_UNLOCK(x) do {  \
> +                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
> +                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
> +                       } while (0)
>  
Sorry, but here I am confused: for parisc-linux unlock means (x)->lock = 1?

may be the jda idea: <http://lists.parisc-linux.org/pipermail/parisc-linux/2004-August/024440.html>
#define __lock_reset(lock_addr,tmp) \
   __asm__ __volatile__ ("stw,ma %1,0(%0)" \
			 : : "r" (lock_addr), "r" (tmp) : "memory");
(tmp or flag may be?)

and if I better understand the idea:

#define SPIN_UNLOCK(x)	__lock_reset((&(x)->lock), 1)

What do you think?

Joel
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http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-29 16:11   ` Joel Soete
@ 2004-08-29 16:13     ` Kyle McMartin
  2004-08-30  4:06       ` Grant Grundler
  2004-08-29 16:14     ` Thibaut VARENE
  2004-08-29 17:45     ` John David Anglin
  2 siblings, 1 reply; 12+ messages in thread
From: Kyle McMartin @ 2004-08-29 16:13 UTC (permalink / raw)
  To: Joel Soete; +Cc: parisc-linux

On Sun, Aug 29, 2004 at 04:11:10PM +0000, Joel Soete wrote:
> Sorry, but here I am confused: for parisc-linux unlock means (x)->lock = 1?
> 
Yes, because the only atomic instruction we have is load and clear.

Cheers,
-- 
Kyle McMartin
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-29 16:11   ` Joel Soete
  2004-08-29 16:13     ` Kyle McMartin
@ 2004-08-29 16:14     ` Thibaut VARENE
  2004-08-29 17:45     ` John David Anglin
  2 siblings, 0 replies; 12+ messages in thread
From: Thibaut VARENE @ 2004-08-29 16:14 UTC (permalink / raw)
  To: Joel Soete; +Cc: Kyle McMartin, parisc-linux

On Sun, 29 Aug 2004 16:11:10 +0000
Joel Soete <soete.joel@tiscali.be> wrote:

> 
> 
> Kyle McMartin wrote:
> > Once more unto the brink,
> > 
> > Commitable?
> > 
> mmm,
> 
> [...]
> 
> > Index: include/asm-parisc/atomic.h
> > ===================================================================
> > RCS file: /var/cvs/linux-2.4/include/asm-parisc/atomic.h,v
> > retrieving revision 1.10
> > diff -u -r1.10 atomic.h
> > --- include/asm-parisc/atomic.h	13 Sep 2002 21:43:37 -0000	1.10
> > +++ include/asm-parisc/atomic.h	28 Aug 2004 18:56:09 -0000
> > @@ -30,8 +30,11 @@
> >   *
> >   * XXX REVISIT these could be renamed and moved to spinlock_t.h as
> >   well*/
> > -#define SPIN_LOCK(x)	do { while(__ldcw(&(x)->lock) == 0); } while(0)
> > -#define SPIN_UNLOCK(x)  do { (x)->lock = 1; } while(0)
> > +#define SPIN_LOCK(x) do { while(__ldcw(&(x)->lock) == 0); } while(0)
> > +#define SPIN_UNLOCK(x) do {  \
> > +                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
> > +                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
> > +                       } while (0)
> >  
> Sorry, but here I am confused: for parisc-linux unlock means (x)->lock =
> 1?

yes


Thibaut VARENE
The PA/Linux ESIEE Team
http://www.pateam.org/

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-29 16:11   ` Joel Soete
  2004-08-29 16:13     ` Kyle McMartin
  2004-08-29 16:14     ` Thibaut VARENE
@ 2004-08-29 17:45     ` John David Anglin
  2 siblings, 0 replies; 12+ messages in thread
From: John David Anglin @ 2004-08-29 17:45 UTC (permalink / raw)
  To: Joel Soete; +Cc: kyle, parisc-linux

> > +#define SPIN_UNLOCK(x) do {  \
> > +                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
> > +                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
> > +                       } while (0)
> >  
> Sorry, but here I am confused: for parisc-linux unlock means (x)->lock = 1?
> 
> may be the jda idea:
> <http://lists.parisc-linux.org/pipermail/parisc-linux/2004-August/024440.htm
> l>
> #define __lock_reset(lock_addr,tmp) \
>    __asm__ __volatile__ ("stw,ma %1,0(%0)" \
> 			 : : "r" (lock_addr), "r" (tmp) : "memory");
> (tmp or flag may be?)
> 
> and if I better understand the idea:
> 
> #define SPIN_UNLOCK(x)	__lock_reset((&(x)->lock), 1)

To reset the lock, the value 1 needs to be loaded into a register
for the memory store.  In situations where you both lock and unlock,
the value 1 will be loaded into a register, say tmp, on a successful
lock.  This value can be used to reset the lock, saving one instruction.
That's why I had "tmp" in the lock macro.  If you don't have the value
from the previous lock, you can just use 1.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-29 16:13     ` Kyle McMartin
@ 2004-08-30  4:06       ` Grant Grundler
  2004-08-30  4:14         ` Kyle McMartin
  0 siblings, 1 reply; 12+ messages in thread
From: Grant Grundler @ 2004-08-30  4:06 UTC (permalink / raw)
  To: Kyle McMartin; +Cc: parisc-linux

On Sun, Aug 29, 2004 at 12:13:18PM -0400, Kyle McMartin wrote:
> On Sun, Aug 29, 2004 at 04:11:10PM +0000, Joel Soete wrote:
> > Sorry, but here I am confused: for parisc-linux unlock means (x)->lock = 1?
> > 
> Yes, because the only atomic instruction we have is load and clear.

I think you missed Joel's point.
Where does SPIN_UNLOCK set the register that it stores to 1?

grant

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-30  4:06       ` Grant Grundler
@ 2004-08-30  4:14         ` Kyle McMartin
  2004-08-30  4:30           ` Grant Grundler
  0 siblings, 1 reply; 12+ messages in thread
From: Kyle McMartin @ 2004-08-30  4:14 UTC (permalink / raw)
  To: Grant Grundler; +Cc: parisc-linux

On Sun, Aug 29, 2004 at 10:06:35PM -0600, Grant Grundler wrote:
> I think you missed Joel's point.
> Where does SPIN_UNLOCK set the register that it stores to 1?
> 
Eh, that's what the "r" (...) does. As I understand it, GCC will have
the value inside the brackets loaded into a register (in this case,
%1 which can be any general register) when the execution path gets to
the assembler.

AIUI, the syntax is
asm(" /* assembler */ "
    : output
    : input
    : clobbers );

Cheers,
-- 
Kyle McMartin
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-30  4:14         ` Kyle McMartin
@ 2004-08-30  4:30           ` Grant Grundler
  2004-08-30  4:37             ` Kyle McMartin
  0 siblings, 1 reply; 12+ messages in thread
From: Grant Grundler @ 2004-08-30  4:30 UTC (permalink / raw)
  To: Kyle McMartin; +Cc: parisc-linux

On Mon, Aug 30, 2004 at 12:14:19AM -0400, Kyle McMartin wrote:
> On Sun, Aug 29, 2004 at 10:06:35PM -0600, Grant Grundler wrote:
> > I think you missed Joel's point.
> > Where does SPIN_UNLOCK set the register that it stores to 1?
> > 
> Eh, that's what the "r" (...) does. As I understand it, GCC will have
> the value inside the brackets loaded into a register (in this case,
> %1 which can be any general register) when the execution path gets to
> the assembler.

Ah ok. But the original code you posted was this:
+#define SPIN_UNLOCK(x) do {  \
+                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
+                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
+                       } while (0)

which used '"r" (0)' for input.

The correct version got committed though:
#define SPIN_UNLOCK(x) do {  \
		__asm__ __volatile__ ("stw,ma %1,0(%0)" \ 	 
		: : "r" (&(x)->lock), "r" (1) : "memory"); \ 	 
	} while (0)

Sorry...but why did you back this change out in the next commit?

The comment "reverting unnecessary atomic.h changes" is correct.
Strictly speaking, coherent stores are not required.

thanks,
grant
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [parisc-linux] memory barriers, spinlocks, debuglocks, oh my
  2004-08-30  4:30           ` Grant Grundler
@ 2004-08-30  4:37             ` Kyle McMartin
  0 siblings, 0 replies; 12+ messages in thread
From: Kyle McMartin @ 2004-08-30  4:37 UTC (permalink / raw)
  To: Grant Grundler; +Cc: parisc-linux

On Sun, Aug 29, 2004 at 10:30:20PM -0600, Grant Grundler wrote:
> Ah ok. But the original code you posted was this:
> +#define SPIN_UNLOCK(x) do {  \
> +                         __asm__ __volatile__ ("stw,ma %1,0(%0)" \
> +                         : : "r" (&(x)->lock), "r" (0) : "memory"); \
> +                       } while (0)
> 
This was what Randolph posted earlier in the thread, and I forgot to
spot the error. :\

> Sorry...but why did you back this change out in the next commit?
> 
> The comment "reverting unnecessary atomic.h changes" is correct.
> Strictly speaking, coherent stores are not required.
>
James pointed out that it wasn't necessary, and I wanted to keep changes
to a minimum for the next version of the 2.4.27 Debian packages that
Thibaut was creating.

Sorry for any confusion.

Regards,
-- 
Kyle McMartin
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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2004-08-30  4:37 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-08-27 16:37 [parisc-linux] memory barriers, spinlocks, debuglocks, oh my Kyle McMartin
     [not found] ` <1093625820.2010.26.camel@mulgrave>
     [not found]   ` <20040827170342.GD25975@baldric.uwo.ca>
2004-08-28 16:57     ` Joel Soete
2004-08-28 17:07       ` Kyle McMartin
2004-08-28 22:15 ` Kyle McMartin
2004-08-29 16:11   ` Joel Soete
2004-08-29 16:13     ` Kyle McMartin
2004-08-30  4:06       ` Grant Grundler
2004-08-30  4:14         ` Kyle McMartin
2004-08-30  4:30           ` Grant Grundler
2004-08-30  4:37             ` Kyle McMartin
2004-08-29 16:14     ` Thibaut VARENE
2004-08-29 17:45     ` John David Anglin

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