[PATCH 2.6] tlbwr hazard for NEC VR4100

[PATCH 2.6] tlbwr hazard for NEC VR4100

[Yoichi Yuasa]

Hi Ralf,

This patch had added tlbwr hazard for NEC VR4100.
Please apply this patch to 2.6.

Yoichi

Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>

diff -urN -X dontdiff a-orig/arch/mips/mm/tlbex.c a/arch/mips/mm/tlbex.c
--- a-orig/arch/mips/mm/tlbex.c	Tue Nov 30 20:42:08 2004
+++ a/arch/mips/mm/tlbex.c	Wed Dec  1 23:23:11 2004
@@ -820,6 +820,25 @@
 		i_ssnop(p);
 		break;
 
+	case CPU_VR4111:
+	case CPU_VR4121:
+	case CPU_VR4122:
+	case CPU_VR4181:
+	case CPU_VR4181A:
+		i_nop(p);
+		i_nop(p);
+		i_tlbwr(p);
+		i_nop(p);
+		i_nop(p);
+		break;
+
+	case CPU_VR4131:
+	case CPU_VR4133:
+		i_nop(p);
+		i_nop(p);
+		i_tlbwr(p);
+		break;
+
 	default:
 		panic("No TLB refill handler yet (CPU type: %d)",
 		      current_cpu_data.cputype);

Re: [PATCH 2.6] tlbwr hazard for NEC VR4100

[Ralf Baechle]

On Wed, Dec 01, 2004 at 11:49:43PM +0900, Yoichi Yuasa wrote:

> This patch had added tlbwr hazard for NEC VR4100.
> Please apply this patch to 2.6.

Thanks, applied.

  Ralf

Re: [PATCH 2.6] tlbwr hazard for NEC VR4100

[Thiemo Seufer]

Yoichi Yuasa wrote:
> Hi Ralf,
> 
> This patch had added tlbwr hazard for NEC VR4100.
> Please apply this patch to 2.6.
> 
> Yoichi
> 
> Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
> 
> diff -urN -X dontdiff a-orig/arch/mips/mm/tlbex.c a/arch/mips/mm/tlbex.c
> --- a-orig/arch/mips/mm/tlbex.c	Tue Nov 30 20:42:08 2004
> +++ a/arch/mips/mm/tlbex.c	Wed Dec  1 23:23:11 2004
> @@ -820,6 +820,25 @@
>  		i_ssnop(p);
>  		break;
>  
> +	case CPU_VR4111:
> +	case CPU_VR4121:
> +	case CPU_VR4122:
> +	case CPU_VR4181:
> +	case CPU_VR4181A:
> +		i_nop(p);
> +		i_nop(p);
> +		i_tlbwr(p);
> +		i_nop(p);
> +		i_nop(p);
> +		break;
> +
> +	case CPU_VR4131:
> +	case CPU_VR4133:
> +		i_nop(p);
> +		i_nop(p);
> +		i_tlbwr(p);
> +		break;

If 64bit kernels are ever relevant for VR41xx, you might want to use
the same branch trick as it is used for R4[04]00. IIRC it reduced the
handler size from 34 to 30 instructions, saving another branch.

(If the XTLB refill handler doesn't fit in 32 instructions, it wraps
around to the 32bit TLB handler space and continues there. This costs
1-3 additional instructions.)


Thiemo

Re: [PATCH 2.6] tlbwr hazard for NEC VR4100

[Maciej W. Rozycki]

On Thu, 2 Dec 2004, Thiemo Seufer wrote:

> If 64bit kernels are ever relevant for VR41xx, you might want to use
> the same branch trick as it is used for R4[04]00. IIRC it reduced the
> handler size from 34 to 30 instructions, saving another branch.

 Isn't that based on specific properties of the R4[04]00 pipeline?  It may
still work for the VR41xx, but you can't take it for granted, so it should
be double-checked.  Given the conditions it's probably worth the hassle,
though.

  Maciej

Re: [PATCH 2.6] tlbwr hazard for NEC VR4100

[Yoichi Yuasa]

On Thu, 2 Dec 2004 00:24:30 +0000 (GMT)
"Maciej W. Rozycki" <macro@linux-mips.org> wrote:

> On Thu, 2 Dec 2004, Thiemo Seufer wrote:
> 
> > If 64bit kernels are ever relevant for VR41xx, you might want to use
> > the same branch trick as it is used for R4[04]00. IIRC it reduced the
> > handler size from 34 to 30 instructions, saving another branch.
> 
>  Isn't that based on specific properties of the R4[04]00 pipeline?  It may
> still work for the VR41xx, but you can't take it for granted, so it should
> be double-checked.  Given the conditions it's probably worth the hassle,
> though.

The specification of VR41xx does not have the guarantee to the branch trick.
Furthermore, VR41xx has the NEC original pipeline.

I think that the present method is exact for VR41xx.

Yoichi