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From: Andi Kleen <ak@suse.de>
To: Blaisorblade <blaisorblade@yahoo.it>
Cc: Andrew Morton <akpm@osdl.org>, Jeff Dike <jdike@addtoit.com>,
	linux-kernel@vger.kernel.org,
	user-mode-linux-devel@lists.sourceforge.net
Subject: [uml-devel] Re: [PATCH 4/6] x86_64: fix L1_CACHE_SHIFT_MAX for Intel EM64T [for 2.6.14?]
Date: Wed, 26 Oct 2005 01:33:03 +0200	[thread overview]
Message-ID: <200510260133.03425.ak@suse.de> (raw)
In-Reply-To: <200510260044.26138.blaisorblade@yahoo.it>

On Wednesday 26 October 2005 00:44, Blaisorblade wrote:

> For what I see, that's based on the tradeoff between space and contention -
> for instance there are few zones only, so there's no big waste.

If space is precious it shouldn't be padded at all.

> In  practice, interpreting !X86_GENERIC as "I will run this kernel on _this_
> processor" could also be done.

That is what it always meant yes.

> However, in case you didn't note, max_align is never enough on EM64T
> currently, right?

I will prepare patches for .15 to remove it completely, that should fix that 
problem.

-Andi


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WARNING: multiple messages have this Message-ID (diff)
From: Andi Kleen <ak@suse.de>
To: Blaisorblade <blaisorblade@yahoo.it>
Cc: Andrew Morton <akpm@osdl.org>, Jeff Dike <jdike@addtoit.com>,
	linux-kernel@vger.kernel.org,
	user-mode-linux-devel@lists.sourceforge.net
Subject: Re: [PATCH 4/6] x86_64: fix L1_CACHE_SHIFT_MAX for Intel EM64T [for 2.6.14?]
Date: Wed, 26 Oct 2005 01:33:03 +0200	[thread overview]
Message-ID: <200510260133.03425.ak@suse.de> (raw)
In-Reply-To: <200510260044.26138.blaisorblade@yahoo.it>

On Wednesday 26 October 2005 00:44, Blaisorblade wrote:

> For what I see, that's based on the tradeoff between space and contention -
> for instance there are few zones only, so there's no big waste.

If space is precious it shouldn't be padded at all.

> In  practice, interpreting !X86_GENERIC as "I will run this kernel on _this_
> processor" could also be done.

That is what it always meant yes.

> However, in case you didn't note, max_align is never enough on EM64T
> currently, right?

I will prepare patches for .15 to remove it completely, that should fix that 
problem.

-Andi

  reply	other threads:[~2005-10-25 23:32 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-10-25 22:11 [uml-devel] [PATCH 1/6] Uml - reuse i386 cpu-specific tuning Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:11 ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12 ` [uml-devel] [PATCH 2/6] uml: fix "reuse i386 cpu optimizations" Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12   ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12 ` [uml-devel] [PATCH 3/6] uml: remove old UM_FASTCALL, and make the thing work again Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12   ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12 ` [uml-devel] [PATCH 4/6] x86_64: fix L1_CACHE_SHIFT_MAX for Intel EM64T [for 2.6.14?] Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:12   ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:24   ` [uml-devel] " Andi Kleen
2005-10-25 22:24     ` Andi Kleen
2005-10-25 22:44     ` [uml-devel] " Blaisorblade
2005-10-25 22:44       ` Blaisorblade
2005-10-25 23:33       ` Andi Kleen [this message]
2005-10-25 23:33         ` Andi Kleen
2005-10-26  0:00         ` [uml-devel] " Blaisorblade
2005-10-26  0:00           ` Blaisorblade
2005-10-25 22:13 ` [uml-devel] [PATCH 5/6] i386: use -mcpu, not -mtune, for GCCs older than 3.4 Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:13   ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:13 ` [uml-devel] [PATCH 6/6] x86_64: enable xchg optimization for x86_64 Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:13   ` Paolo 'Blaisorblade' Giarrusso
2005-10-25 22:22   ` [uml-devel] " Andi Kleen
2005-10-25 22:22     ` Andi Kleen
2005-10-25 22:44     ` [uml-devel] " Blaisorblade
2005-10-25 22:44       ` Blaisorblade
2005-10-26  7:22 ` [uml-devel] Re: [PATCH 1/6] Uml - reuse i386 cpu-specific tuning Andrew Morton
2005-10-26  7:22   ` Andrew Morton
2005-10-26  9:19   ` [uml-devel] " Blaisorblade
2005-10-26  9:19     ` Blaisorblade

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