From: Andi Kleen <ak@suse.de>
To: Kimball Murray <kimball.murray@gmail.com>
Cc: linux-kernel@vger.kernel.org, akpm@digeo.com, kmurray@redhat.com,
natalie.protasevich@unisys.com, len.brown@intel.com,
linux-acpi@vger.kernel.org
Subject: Re: [git Patch 1/1] avoid IRQ0 ioapic pin collision
Date: Fri, 21 Apr 2006 04:17:58 +0200 [thread overview]
Message-ID: <200604210417.59028.ak@suse.de> (raw)
In-Reply-To: <20060420230931.10317.38083.sendpatchset@dhcp83-97.boston.redhat.com>
On Friday 21 April 2006 01:14, Kimball Murray wrote:
> Hello!
>
> I'm working on an x86_64 platfrom, where I've hit a problem that appears to
> be caused by a patch that went into 2.6.13 some time ago. (git details are
> below). Basically, that patch introduced a work-around for a VIA chipset
> limitation (only 4 bits to store a PCI interrupt). And that work-around
> causes an unfortunate pin collision on our ioapic.
The patch looks reasonable except
- The variable should be __initdata
- The externs belong in headers
Actually I plan to garbage collect large parts of the x86-64 check_timer
RSN (basically I want to eliminate all the non ACPI compliant routing
support). That might simplify a bit. But I guess it would be still all
needed for i386 anyways, so it's ok to have it.
-Andi
next prev parent reply other threads:[~2006-04-21 2:18 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-04-20 23:14 [git Patch 1/1] avoid IRQ0 ioapic pin collision Kimball Murray
2006-04-20 23:14 ` Kimball Murray
2006-04-21 2:17 ` Andi Kleen [this message]
2006-04-23 5:02 ` Sergio Monteiro Basto
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