* [PATCH] add X86_FEATURE_PEBS and detection
@ 2006-10-06 9:10 Stephane Eranian
2006-10-16 10:09 ` Andi Kleen
0 siblings, 1 reply; 3+ messages in thread
From: Stephane Eranian @ 2006-10-06 9:10 UTC (permalink / raw)
To: linux-kernel; +Cc: ak, Stephane Eranian
Hello,
Here is a patch (used by perfmon2) to detect the presence of the
Precise Event Based Sampling (PEBS) feature for Intel 64-bit processors.
The patch also adds the cpu_has_pebs macro.
IMPORTANT: you need to have the X86_FEATURE_DS renaming patch applied first!
changelog:
- adds X86_FEATURE_PEBS
- adds cpu_has_pebs to test for X86_FEATURE_PEBS
signed-off-by: stephane eranian <eranian@hpl.hp.com>
--- a/arch/x86_64/kernel/setup.c
+++ b/arch/x86_64/kernel/setup.c
@@ -835,6 +835,13 @@ static void __cpuinit init_intel(struct
set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
}
+ if (cpu_has_ds) {
+ unsigned int l1, l2;
+ rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
+ if (!(l1 & (1<<12)))
+ set_bit(X86_FEATURE_PEBS, c->x86_capability);
+ }
+
n = c->extended_cpuid_level;
if (n >= 0x80000008) {
unsigned eax = cpuid_eax(0x80000008);
--- a/include/asm-x86_64/cpufeature.h
+++ b/include/asm-x86_64/cpufeature.h
@@ -68,6 +68,7 @@
#define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */
#define X86_FEATURE_UP (3*32+8) /* SMP kernel running on UP */
#define X86_FEATURE_ARCH_PERFMON (3*32+9) /* Intel Architectural PerfMon */
+#define X86_FEATURE_PEBS (3*32+10) /* Precise-Event Based Sampling */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
@@ -113,5 +114,6 @@
#define cpu_has_centaur_mcr 0
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS)
+#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
#endif /* __ASM_X8664_CPUFEATURE_H */
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] add X86_FEATURE_PEBS and detection
2006-10-06 9:10 [PATCH] add X86_FEATURE_PEBS and detection Stephane Eranian
@ 2006-10-16 10:09 ` Andi Kleen
2006-10-16 11:28 ` Stephane Eranian
0 siblings, 1 reply; 3+ messages in thread
From: Andi Kleen @ 2006-10-16 10:09 UTC (permalink / raw)
To: eranian; +Cc: linux-kernel
On Friday 06 October 2006 11:10, Stephane Eranian wrote:
> Hello,
>
> Here is a patch (used by perfmon2) to detect the presence of the
> Precise Event Based Sampling (PEBS) feature for Intel 64-bit processors.
> The patch also adds the cpu_has_pebs macro.
>
> IMPORTANT: you need to have the X86_FEATURE_DS renaming patch applied first!
Added both thanks. I suppose similar i386 patches will be needed too.
If you have patches that depend on each other please number
them in the future.
-Andi
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] add X86_FEATURE_PEBS and detection
2006-10-16 10:09 ` Andi Kleen
@ 2006-10-16 11:28 ` Stephane Eranian
0 siblings, 0 replies; 3+ messages in thread
From: Stephane Eranian @ 2006-10-16 11:28 UTC (permalink / raw)
To: Andi Kleen; +Cc: linux-kernel
On Mon, Oct 16, 2006 at 12:09:19PM +0200, Andi Kleen wrote:
> On Friday 06 October 2006 11:10, Stephane Eranian wrote:
> > Hello,
> >
> > Here is a patch (used by perfmon2) to detect the presence of the
> > Precise Event Based Sampling (PEBS) feature for Intel 64-bit processors.
> > The patch also adds the cpu_has_pebs macro.
> >
> > IMPORTANT: you need to have the X86_FEATURE_DS renaming patch applied first!
>
> Added both thanks. I suppose similar i386 patches will be needed too.
>
Yes (take 32-bit P4 for instance), I submitted them to LML already.
> If you have patches that depend on each other please number
> them in the future.
>
Ok.
--
-Stephane
^ permalink raw reply [flat|nested] 3+ messages in thread
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2006-10-06 9:10 [PATCH] add X86_FEATURE_PEBS and detection Stephane Eranian
2006-10-16 10:09 ` Andi Kleen
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