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From: David Brownell <david-b@pacbell.net>
To: Russell King <rmk+lkml@arm.linux.org.uk>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>,
	Jean Delvare <khali@linux-fr.org>, Bryan Wu <bryan.wu@analog.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Deepak Saxena <dsaxena@plexity.net>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Bitbanging i2c bus driver using the GPIO API
Date: Fri, 9 Mar 2007 13:17:56 -0800	[thread overview]
Message-ID: <200703091317.58178.david-b@pacbell.net> (raw)
In-Reply-To: <20070309200850.GA8444@flint.arm.linux.org.uk>

On Friday 09 March 2007 12:08 pm, Russell King wrote:
> On Fri, Mar 09, 2007 at 11:30:12AM -0800, David Brownell wrote:
> > On Friday 09 March 2007 10:48 am, Haavard Skinnemoen wrote:
> > > This is a very simple bitbanging i2c bus driver utilizing the new
> > > arch-neutral GPIO API. Useful for chips that don't have a built-in
> > > i2c controller, additional i2c busses, or testing purposes.
> > 
> > That's the right idea!  But remember that not all GPIOs support
> > reading back the actual value on SCL (it's an OUT pin, so lacking
> > multidrive capability the values "should" be what you wrote), so
> > getscl() support should depend on a flag in platform data.  In
> > the same vein, if SCL is an output-only pin, you won't be able
> > to change its direction ... but then, I'm not sure why you were
> > changing its direction in setscl() rather than just its value.
> 
> That's a more correct I2C implementation.  If you read the specs, the
> SDA and SCL signals are supposed to be driven by open-collector or
> open-drain drivers, such that devices only pull the bus low.  Pull-up
> resistors pull the signals high when undriven.

Exactly as I had mentioned:

> > I2C has another interesting special case.  at91_set_multi_drive()
> > would be appropriate (yes?) for ARCH_AT91 to use on SCL, to best
> > support both clock stretching and multi-master configurations.

Where "multi-drive" == open-drain.  You're saying it should also be
used on SDA too ... OK, I was focussing on clock stretching but it
applies there too.

 
> This avoids the possibility of damage caused when one device drives
> a signal low and another device tries to drive it high.
> 
> Therefore, the correct I2C GPIO implementation is one where you drive
> both SDA and SCL low by using a combination of the data direction
> register and the output level register, but avoid driving the output
> high.

I see your point -- it does answer my question -- but you seem to have
overlooked a highly relevant one of mine.  :)

Regardless, those nuances should be captured in comments in that
driver:  that for GPIOs that don't support open drain output (only
push/pull drivers), that it's faked by otherwise-unnecessary
tweaking of GPIO direction.

- Dave


  reply	other threads:[~2007-03-09 21:18 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-03-09 10:13 [PATCH] i2c-core: i2c bitbang gpio structure Wu, Bryan
2007-03-09 16:55 ` Jean Delvare
2007-03-09 17:45   ` David Brownell
2007-03-09 18:48     ` [PATCH] Bitbanging i2c bus driver using the GPIO API Haavard Skinnemoen
2007-03-09 19:30       ` David Brownell
2007-03-09 20:08         ` Russell King
2007-03-09 21:17           ` David Brownell [this message]
2007-03-09 20:43         ` Håvard Skinnemoen
2007-03-09 21:45           ` David Brownell
2007-03-10 13:13             ` [PATCH v2] " Haavard Skinnemoen
2007-03-10 20:15               ` Jean Delvare
2007-03-11  4:31                 ` David Brownell
2007-03-12 14:11                 ` Haavard Skinnemoen
2007-03-11  4:02               ` David Brownell
2007-03-12 10:07               ` Wu, Bryan
2007-03-12 14:34                 ` Haavard Skinnemoen
2007-03-12 14:53                   ` Haavard Skinnemoen
2007-03-12 15:11                     ` Jean Delvare
2007-03-12 15:30                       ` Haavard Skinnemoen
2007-03-10 19:15         ` [PATCH] " Jean Delvare

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