All of lore.kernel.org
 help / color / mirror / Atom feed
* TLS register for NPTL
@ 2007-08-20  6:59 Carl van Schaik
  2007-08-20  8:06 ` Thiemo Seufer
  0 siblings, 1 reply; 5+ messages in thread
From: Carl van Schaik @ 2007-08-20  6:59 UTC (permalink / raw)
  To: linux-mips

Hi All,

It seems the rdhwr emulation is used/proposed for accessing the thread
word in NPTL.
I've been reading some of the posts from 2005 about this choice of this
and what I have missed is anyone talking about using the "k0" register
for TLS. It seems logical that the kernel could always restore k0 on
returning to user-land and having k1 only for the last part of returning
to user is sufficient. Any reason why this was not looked at?

regards,
Carl van Schaik

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: TLS register for NPTL
  2007-08-20  6:59 TLS register for NPTL Carl van Schaik
@ 2007-08-20  8:06 ` Thiemo Seufer
  2007-08-20 14:54   ` Ralf Baechle
  0 siblings, 1 reply; 5+ messages in thread
From: Thiemo Seufer @ 2007-08-20  8:06 UTC (permalink / raw)
  To: Carl van Schaik; +Cc: linux-mips

Carl van Schaik wrote:
> Hi All,
> 
> It seems the rdhwr emulation is used/proposed for accessing the thread
> word in NPTL.
> I've been reading some of the posts from 2005 about this choice of this
> and what I have missed is anyone talking about using the "k0" register
> for TLS. It seems logical that the kernel could always restore k0 on
> returning to user-land and having k1 only for the last part of returning
> to user is sufficient. Any reason why this was not looked at?

The TLB handlers need k0/k1 as well and have no good place to save/restore
a register.


Thiemo

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: TLS register for NPTL
  2007-08-20  8:06 ` Thiemo Seufer
@ 2007-08-20 14:54   ` Ralf Baechle
  2007-08-21  1:53     ` Carl van Schaik
  0 siblings, 1 reply; 5+ messages in thread
From: Ralf Baechle @ 2007-08-20 14:54 UTC (permalink / raw)
  To: Thiemo Seufer; +Cc: Carl van Schaik, linux-mips

On Mon, Aug 20, 2007 at 09:06:27AM +0100, Thiemo Seufer wrote:

> > It seems the rdhwr emulation is used/proposed for accessing the thread
> > word in NPTL.
> > I've been reading some of the posts from 2005 about this choice of this
> > and what I have missed is anyone talking about using the "k0" register
> > for TLS. It seems logical that the kernel could always restore k0 on
> > returning to user-land and having k1 only for the last part of returning
> > to user is sufficient. Any reason why this was not looked at?
> 
> The TLB handlers need k0/k1 as well and have no good place to save/restore
> a register.

It can be done but would require several extra instructions in the most
performance sensitive parts of the OS.

Aside, latest MIPS processors support a hardware implementation of rdhwr $29,
so there is no more emulation overhead for this instruction at full binary
compatibility.

  Ralf

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: TLS register for NPTL
  2007-08-20 14:54   ` Ralf Baechle
@ 2007-08-21  1:53     ` Carl van Schaik
  2007-08-21 12:42       ` Ralf Baechle
  0 siblings, 1 reply; 5+ messages in thread
From: Carl van Schaik @ 2007-08-21  1:53 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: Thiemo Seufer, linux-mips

Ralf Baechle wrote:
> On Mon, Aug 20, 2007 at 09:06:27AM +0100, Thiemo Seufer wrote:
>
>   
>>> It seems the rdhwr emulation is used/proposed for accessing the thread
>>> word in NPTL.
>>> I've been reading some of the posts from 2005 about this choice of this
>>> and what I have missed is anyone talking about using the "k0" register
>>> for TLS. It seems logical that the kernel could always restore k0 on
>>> returning to user-land and having k1 only for the last part of returning
>>> to user is sufficient. Any reason why this was not looked at?
>>>       
>> The TLB handlers need k0/k1 as well and have no good place to save/restore
>> a register.
>>     
>
> It can be done but would require several extra instructions in the most
> performance sensitive parts of the OS.
>
> Aside, latest MIPS processors support a hardware implementation of rdhwr $29,
> so there is no more emulation overhead for this instruction at full binary
> compatibility.
>   
Ok, I agree that this is probably the best way to go. In the L4
microkernel we have for a long time used k0 (sony did this as well?),
but that was before any rdhwr existed, hence my questions. It should be
easy to change L4 to use rdhwr, or both for an intermediate period of
time which allows us to virtualize Linux mips applications with NPTL.

thanks,
Carl

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: TLS register for NPTL
  2007-08-21  1:53     ` Carl van Schaik
@ 2007-08-21 12:42       ` Ralf Baechle
  0 siblings, 0 replies; 5+ messages in thread
From: Ralf Baechle @ 2007-08-21 12:42 UTC (permalink / raw)
  To: Carl van Schaik; +Cc: Thiemo Seufer, linux-mips

On Tue, Aug 21, 2007 at 11:53:49AM +1000, Carl van Schaik wrote:

> > Aside, latest MIPS processors support a hardware implementation of rdhwr $29,
> > so there is no more emulation overhead for this instruction at full binary
> > compatibility.
> >   
> Ok, I agree that this is probably the best way to go. In the L4
> microkernel we have for a long time used k0 (sony did this as well?),

For the PS2, yes.  Then again the R5900 design is screwed to the point where
it can't reasonably be exploited without adding another AI variant - but that
only makes the use of k0 a slightly less bad idea.

  Ralf

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2007-08-21 12:44 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-08-20  6:59 TLS register for NPTL Carl van Schaik
2007-08-20  8:06 ` Thiemo Seufer
2007-08-20 14:54   ` Ralf Baechle
2007-08-21  1:53     ` Carl van Schaik
2007-08-21 12:42       ` Ralf Baechle

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.