From: Jeremy Higdon <jeremy@sgi.com>
To: Jes Sorensen <jes@sgi.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>,
akepner@sgi.com, Randy Dunlap <randy.dunlap@oracle.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
rdreier@cisco.com, linux-ia64 <linux-ia64@vger.kernel.org>
Subject: Re: [PATCH 2/3] dma: override "dma_flags_set_dmaflush" for sn-ia64
Date: Thu, 23 Aug 2007 05:58:56 +0000 [thread overview]
Message-ID: <20070823055856.GN89849@sgi.com> (raw)
In-Reply-To: <46CBE838.4000302@sgi.com>
On Wed, Aug 22, 2007 at 09:39:36AM +0200, Jes Sorensen wrote:
> James Bottomley wrote:
> >On Tue, 2007-08-21 at 17:34 -0700, akepner@sgi.com wrote:
> >>The term "posted DMA" is used to describe this behavior in the Altix
> >>Device Driver Writer's Guide, but it may be confusing things here.
> >>Maybe a better term will suggest itself if I can clarify....
> >
> >OK, but posted DMA has a pretty specific meaning in terms of PCI, hence
> >the confusion.
>
> Maybe it would be more better to refer to this as 'out of order DMA'?
>
> >>On Altix, DMA from a device isn't guaranteed to arrive in host memory
> >>in the order it was sent from the device. This reordering can happen
> >>in the NUMA interconnect (it's specifically not a PCI reordering.)
> >
> >This is mmiowb and read_relaxed() again, isn't it?
>
> I believe it's the same problem, except this time it's when exposing
> structures to userland.
Actually, it's a different problem, but with a similar cause.
mmiowb() is for the case PIO (or MMIO) write order from two different CPUs
can invert somewhere in the NL fabric.
read_relaxed() is a performance optimization to avoid the flush that's
necessary to avoid inversion in order between a PIO (or MMIO) read and
a DMA write.
What Arthur's trying to do here is avoid inversion in the order of two
DMA writes.
jeremy
WARNING: multiple messages have this Message-ID (diff)
From: Jeremy Higdon <jeremy@sgi.com>
To: Jes Sorensen <jes@sgi.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>,
akepner@sgi.com, Randy Dunlap <randy.dunlap@oracle.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
rdreier@cisco.com, linux-ia64 <linux-ia64@vger.kernel.org>
Subject: Re: [PATCH 2/3] dma: override "dma_flags_set_dmaflush" for sn-ia64
Date: Wed, 22 Aug 2007 22:58:56 -0700 [thread overview]
Message-ID: <20070823055856.GN89849@sgi.com> (raw)
In-Reply-To: <46CBE838.4000302@sgi.com>
On Wed, Aug 22, 2007 at 09:39:36AM +0200, Jes Sorensen wrote:
> James Bottomley wrote:
> >On Tue, 2007-08-21 at 17:34 -0700, akepner@sgi.com wrote:
> >>The term "posted DMA" is used to describe this behavior in the Altix
> >>Device Driver Writer's Guide, but it may be confusing things here.
> >>Maybe a better term will suggest itself if I can clarify....
> >
> >OK, but posted DMA has a pretty specific meaning in terms of PCI, hence
> >the confusion.
>
> Maybe it would be more better to refer to this as 'out of order DMA'?
>
> >>On Altix, DMA from a device isn't guaranteed to arrive in host memory
> >>in the order it was sent from the device. This reordering can happen
> >>in the NUMA interconnect (it's specifically not a PCI reordering.)
> >
> >This is mmiowb and read_relaxed() again, isn't it?
>
> I believe it's the same problem, except this time it's when exposing
> structures to userland.
Actually, it's a different problem, but with a similar cause.
mmiowb() is for the case PIO (or MMIO) write order from two different CPUs
can invert somewhere in the NL fabric.
read_relaxed() is a performance optimization to avoid the flush that's
necessary to avoid inversion in order between a PIO (or MMIO) read and
a DMA write.
What Arthur's trying to do here is avoid inversion in the order of two
DMA writes.
jeremy
next prev parent reply other threads:[~2007-08-23 5:58 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-08-18 0:27 [PATCH 2/3] dma: override "dma_flags_set_dmaflush" for sn-ia64 akepner
2007-08-20 8:24 ` Jes Sorensen
2007-08-20 8:24 ` Jes Sorensen
2007-08-20 16:07 ` akepner
2007-08-20 16:07 ` akepner
2007-08-21 19:35 ` akepner
2007-08-21 19:35 ` akepner
2007-08-21 20:05 ` Randy Dunlap
2007-08-21 20:05 ` Randy Dunlap
2007-08-21 20:55 ` James Bottomley
2007-08-21 20:55 ` James Bottomley
2007-08-22 0:34 ` akepner
2007-08-22 0:34 ` akepner
2007-08-22 1:14 ` James Bottomley
2007-08-22 1:14 ` James Bottomley
2007-08-22 7:39 ` Jes Sorensen
2007-08-22 7:39 ` Jes Sorensen
2007-08-22 14:02 ` James Bottomley
2007-08-22 14:02 ` James Bottomley
2007-08-22 16:03 ` Jesse Barnes
2007-08-22 16:03 ` Jesse Barnes
2007-08-22 16:44 ` James Bottomley
2007-08-22 16:44 ` James Bottomley
2007-08-22 16:51 ` Jesse Barnes
2007-08-22 16:51 ` Jesse Barnes
2007-08-22 17:04 ` James Bottomley
2007-08-22 17:04 ` James Bottomley
2007-08-22 17:03 ` Jes Sorensen
2007-08-22 17:03 ` Jes Sorensen
2007-08-22 18:10 ` James Bottomley
2007-08-22 18:10 ` James Bottomley
2007-08-23 8:45 ` Jes Sorensen
2007-08-23 8:45 ` Jes Sorensen
2007-08-22 17:17 ` Jesse Barnes
2007-08-22 17:17 ` Jesse Barnes
2007-08-22 18:13 ` James Bottomley
2007-08-22 18:13 ` James Bottomley
2007-08-22 18:44 ` akepner
2007-08-22 18:44 ` akepner
2007-08-23 5:58 ` Jeremy Higdon [this message]
2007-08-23 5:58 ` Jeremy Higdon
2007-08-22 15:54 ` akepner
2007-08-22 15:54 ` akepner
2007-08-21 20:16 ` Matthew Wilcox
2007-08-21 20:16 ` Matthew Wilcox
2007-08-21 21:37 ` akepner
2007-08-21 21:37 ` akepner
2007-08-22 7:44 ` Jes Sorensen
2007-08-22 7:44 ` Jes Sorensen
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