* [PATCH 2/3] Au1000 : fix PCI controller registration
@ 2007-09-25 15:07 Florian Fainelli
2007-09-25 17:11 ` Ralf Baechle
2007-09-25 17:38 ` [PATCH 2/3 take2] " Florian Fainelli
0 siblings, 2 replies; 6+ messages in thread
From: Florian Fainelli @ 2007-09-25 15:07 UTC (permalink / raw)
To: linux-mips, blogic, nbd
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The PCI controller fails to register, as PCI_MEM_END was greater than
IOMEM_RESOURCE_END and Au1500_PCI_IO_END was greater than
IOPORT_RESOURCE_END
IO{MEM,PORT}_RESOURCE_END value were adjust to represent the actual
memory map of the au1x00.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
--
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diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 58fca8a..046920a 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -1680,9 +1680,9 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
#define PCI_LAST_DEVFN (19<<3)
#define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
-#define IOPORT_RESOURCE_END 0xffffffff
+#define IOPORT_RESOURCE_END 0xfffffffffULL
#define IOMEM_RESOURCE_START 0x10000000
-#define IOMEM_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_END 0xfffffffffULL
/*
* Borrowed from the PPC arch:
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] Au1000 : fix PCI controller registration
2007-09-25 15:07 [PATCH 2/3] Au1000 : fix PCI controller registration Florian Fainelli
@ 2007-09-25 17:11 ` Ralf Baechle
2007-09-25 17:17 ` Florian Fainelli
2007-09-25 17:38 ` [PATCH 2/3 take2] " Florian Fainelli
1 sibling, 1 reply; 6+ messages in thread
From: Ralf Baechle @ 2007-09-25 17:11 UTC (permalink / raw)
To: Florian Fainelli; +Cc: linux-mips, blogic, nbd
On Tue, Sep 25, 2007 at 05:07:28PM +0200, Florian Fainelli wrote:
> diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
> index 58fca8a..046920a 100644
> --- a/include/asm-mips/mach-au1x00/au1000.h
> +++ b/include/asm-mips/mach-au1x00/au1000.h
> @@ -1680,9 +1680,9 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
> #define PCI_LAST_DEVFN (19<<3)
>
> #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
> -#define IOPORT_RESOURCE_END 0xffffffff
> +#define IOPORT_RESOURCE_END 0xfffffffffULL
So you're saying that PCI has just under 64GB worth of ioport address space
on Alchemy? That's not how I recall my PCI spec ...
Ralf
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] Au1000 : fix PCI controller registration
2007-09-25 17:11 ` Ralf Baechle
@ 2007-09-25 17:17 ` Florian Fainelli
2007-09-25 17:18 ` Ralf Baechle
0 siblings, 1 reply; 6+ messages in thread
From: Florian Fainelli @ 2007-09-25 17:17 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, blogic, nbd
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Le mardi 25 septembre 2007, Ralf Baechle a écrit :
> On Tue, Sep 25, 2007 at 05:07:28PM +0200, Florian Fainelli wrote:
> > diff --git a/include/asm-mips/mach-au1x00/au1000.h
> > b/include/asm-mips/mach-au1x00/au1000.h index 58fca8a..046920a 100644
> > --- a/include/asm-mips/mach-au1x00/au1000.h
> > +++ b/include/asm-mips/mach-au1x00/au1000.h
> > @@ -1680,9 +1680,9 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
> > #define PCI_LAST_DEVFN (19<<3)
> >
> > #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
> > -#define IOPORT_RESOURCE_END 0xffffffff
> > +#define IOPORT_RESOURCE_END 0xfffffffffULL
>
> So you're saying that PCI has just under 64GB worth of ioport address space
> on Alchemy? That's not how I recall my PCI spec ...
Errm, no, actually, Alchemy has a 36bits PCI adressing mode if I recall right.
>
> Ralf
--
Cordialement, Florian Fainelli
------------------------------
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] Au1000 : fix PCI controller registration
2007-09-25 17:17 ` Florian Fainelli
@ 2007-09-25 17:18 ` Ralf Baechle
2007-09-25 21:54 ` Florian Fainelli
0 siblings, 1 reply; 6+ messages in thread
From: Ralf Baechle @ 2007-09-25 17:18 UTC (permalink / raw)
To: Florian Fainelli; +Cc: linux-mips, blogic, nbd
On Tue, Sep 25, 2007 at 07:17:10PM +0200, Florian Fainelli wrote:
> > > #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
> > > -#define IOPORT_RESOURCE_END 0xffffffff
> > > +#define IOPORT_RESOURCE_END 0xfffffffffULL
> >
> > So you're saying that PCI has just under 64GB worth of ioport address space
> > on Alchemy? That's not how I recall my PCI spec ...
>
> Errm, no, actually, Alchemy has a 36bits PCI adressing mode if I recall right.
Nope. IOspace is max. 4GB with PCI, even on 64-bit PCI.
Ralf
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/3 take2] Au1000 : fix PCI controller registration
2007-09-25 15:07 [PATCH 2/3] Au1000 : fix PCI controller registration Florian Fainelli
2007-09-25 17:11 ` Ralf Baechle
@ 2007-09-25 17:38 ` Florian Fainelli
1 sibling, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2007-09-25 17:38 UTC (permalink / raw)
To: linux-mips; +Cc: blogic, nbd
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The PCI controller fails to register, as PCI_MEM_END was greater than
IOMEM_RESOURCE_END and Au1500_PCI_IO_END was greater than
IOPORT_RESOURCE_END
IO{MEM,PORT}_RESOURCE_END value were adjust to represent the actual
memory map of the au1x00.
The previous patch introduced a 64GB PCI adressing space, which is wrong.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
--
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diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 58fca8a..d5dbe64 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -1680,9 +1680,9 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
#define PCI_LAST_DEVFN (19<<3)
#define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
-#define IOPORT_RESOURCE_END 0xffffffff
+#define IOPORT_RESOURCE_END 0xffffffffULL
#define IOMEM_RESOURCE_START 0x10000000
-#define IOMEM_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_END 0xffffffffULL
/*
* Borrowed from the PPC arch:
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] Au1000 : fix PCI controller registration
2007-09-25 17:18 ` Ralf Baechle
@ 2007-09-25 21:54 ` Florian Fainelli
0 siblings, 0 replies; 6+ messages in thread
From: Florian Fainelli @ 2007-09-25 21:54 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips, blogic, nbd
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Le mardi 25 septembre 2007, Ralf Baechle a écrit :
> On Tue, Sep 25, 2007 at 07:17:10PM +0200, Florian Fainelli wrote:
> > > > #define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
> > > > -#define IOPORT_RESOURCE_END 0xffffffff
> > > > +#define IOPORT_RESOURCE_END 0xfffffffffULL
> > >
> > > So you're saying that PCI has just under 64GB worth of ioport address
> > > space on Alchemy? That's not how I recall my PCI spec ...
> >
> > Errm, no, actually, Alchemy has a 36bits PCI adressing mode if I recall
> > right.
>
> Nope. IOspace is max. 4GB with PCI, even on 64-bit PCI.
Talking with John Crispin, the MTX-1 really needs this 64Gb IO space thing,
otherwise it does not work and the PCI controller still does not register. We
are preparing a real fix for this.
>
> Ralf
--
Cordialement, Florian Fainelli
------------------------------
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2007-09-25 21:54 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2007-09-25 15:07 [PATCH 2/3] Au1000 : fix PCI controller registration Florian Fainelli
2007-09-25 17:11 ` Ralf Baechle
2007-09-25 17:17 ` Florian Fainelli
2007-09-25 17:18 ` Ralf Baechle
2007-09-25 21:54 ` Florian Fainelli
2007-09-25 17:38 ` [PATCH 2/3 take2] " Florian Fainelli
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