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From: David Gibson <dwg@au1.ibm.com>
To: Hollis Blanchard <hollisb@us.ibm.com>
Cc: kvm-devel@lists.sourceforge.net, linuxppc-dev@ozlabs.org,
	kvm-ppc-devel@lists.sourceforge.net
Subject: Re: [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information
Date: Tue, 08 Apr 2008 03:54:41 +0000	[thread overview]
Message-ID: <20080408035441.GA18501@localhost.localdomain> (raw)
In-Reply-To: <200804072225.33040.hollisb@us.ibm.com>

On Mon, Apr 07, 2008 at 10:25:32PM -0500, Hollis Blanchard wrote:
> On Monday 07 April 2008 20:11:28 David Gibson wrote:
> > On Mon, Apr 07, 2008 at 03:53:33PM -0500, Hollis Blanchard wrote:
> > > 1 file changed, 7 insertions(+)
> > > include/linux/kvm.h |    7 +++++++
> > >
> > >
> > > Device Control Registers are essentially another address space found on
> > > PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits,
> > > and are identified by a 32-bit number.
> >
> > Well... 10-bit, actually.
> 
> The mtdcrux description in the ppc440x6 user manual says the following:
> 
> 	Let the contents of register RA denote a Device Control Register.
> 	The contents of GPR[RS] are placed into the designated Device Control 
> Register.
> 
> I take that to mean that we must worry about 32 bits worth of DCR numbers. 
> Perhaps I should say "no more than" rather than "always".

I think that's less misleading.  mtdcrux is very new, anything which
only has the mtdcr instruction certainly can't take DCR numbers above
10 bits, and I would expect that even on chips with mtdcrux the DCR
bus is probably still only 10-bits, although it could be extended.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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WARNING: multiple messages have this Message-ID (diff)
From: David Gibson <dwg@au1.ibm.com>
To: Hollis Blanchard <hollisb@us.ibm.com>
Cc: kvm-devel@lists.sourceforge.net, linuxppc-dev@ozlabs.org,
	kvm-ppc-devel@lists.sourceforge.net
Subject: Re: [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run
Date: Tue, 8 Apr 2008 13:54:41 +1000	[thread overview]
Message-ID: <20080408035441.GA18501@localhost.localdomain> (raw)
In-Reply-To: <200804072225.33040.hollisb@us.ibm.com>

On Mon, Apr 07, 2008 at 10:25:32PM -0500, Hollis Blanchard wrote:
> On Monday 07 April 2008 20:11:28 David Gibson wrote:
> > On Mon, Apr 07, 2008 at 03:53:33PM -0500, Hollis Blanchard wrote:
> > > 1 file changed, 7 insertions(+)
> > > include/linux/kvm.h |    7 +++++++
> > >
> > >
> > > Device Control Registers are essentially another address space found on
> > > PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits,
> > > and are identified by a 32-bit number.
> >
> > Well... 10-bit, actually.
> 
> The mtdcrux description in the ppc440x6 user manual says the following:
> 
> 	Let the contents of register RA denote a Device Control Register.
> 	The contents of GPR[RS] are placed into the designated Device Control 
> Register.
> 
> I take that to mean that we must worry about 32 bits worth of DCR numbers. 
> Perhaps I should say "no more than" rather than "always".

I think that's less misleading.  mtdcrux is very new, anything which
only has the mtdcr instruction certainly can't take DCR numbers above
10 bits, and I would expect that even on chips with mtdcrux the DCR
bus is probably still only 10-bits, although it could be extended.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

WARNING: multiple messages have this Message-ID (diff)
From: David Gibson <dwg@au1.ibm.com>
To: Hollis Blanchard <hollisb@us.ibm.com>
Cc: kvm-devel@lists.sourceforge.net, linuxppc-dev@ozlabs.org,
	kvm-ppc-devel@lists.sourceforge.net
Subject: Re: [PATCH 2 of 3] [KVM] Add DCR access information to struct	kvm_run
Date: Tue, 8 Apr 2008 13:54:41 +1000	[thread overview]
Message-ID: <20080408035441.GA18501@localhost.localdomain> (raw)
In-Reply-To: <200804072225.33040.hollisb@us.ibm.com>

On Mon, Apr 07, 2008 at 10:25:32PM -0500, Hollis Blanchard wrote:
> On Monday 07 April 2008 20:11:28 David Gibson wrote:
> > On Mon, Apr 07, 2008 at 03:53:33PM -0500, Hollis Blanchard wrote:
> > > 1 file changed, 7 insertions(+)
> > > include/linux/kvm.h |    7 +++++++
> > >
> > >
> > > Device Control Registers are essentially another address space found on
> > > PowerPC 4xx processors, analogous to PIO on x86. DCRs are always 32 bits,
> > > and are identified by a 32-bit number.
> >
> > Well... 10-bit, actually.
> 
> The mtdcrux description in the ppc440x6 user manual says the following:
> 
> 	Let the contents of register RA denote a Device Control Register.
> 	The contents of GPR[RS] are placed into the designated Device Control 
> Register.
> 
> I take that to mean that we must worry about 32 bits worth of DCR numbers. 
> Perhaps I should say "no more than" rather than "always".

I think that's less misleading.  mtdcrux is very new, anything which
only has the mtdcr instruction certainly can't take DCR numbers above
10 bits, and I would expect that even on chips with mtdcrux the DCR
bus is probably still only 10-bits, although it could be extended.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

-------------------------------------------------------------------------
This SF.net email is sponsored by the 2008 JavaOne(SM) Conference 
Register now and save $200. Hurry, offer ends at 11:59 p.m., 
Monday, April 7! Use priority code J8TLD2. 
http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone

  reply	other threads:[~2008-04-08  3:54 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-04-07 20:53 [kvm-ppc-devel] [PATCH 0 of 3] KVM for PowerPC 440 Hollis Blanchard
2008-04-07 20:53 ` Hollis Blanchard
2008-04-07 20:53 ` [kvm-ppc-devel] [PATCH 1 of 3] [POWERPC 44x] Export tlb_44x_hwater Hollis Blanchard
2008-04-07 20:53   ` [PATCH 1 of 3] [POWERPC 44x] Export tlb_44x_hwater for KVM Hollis Blanchard
2008-04-10 14:30   ` [kvm-ppc-devel] [PATCH 1 of 3] [POWERPC 44x] Export Josh Boyer
2008-04-10 14:30     ` [PATCH 1 of 3] [POWERPC 44x] Export tlb_44x_hwater for KVM Josh Boyer
2008-04-07 20:53 ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information to Hollis Blanchard
2008-04-07 20:53   ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run Hollis Blanchard
2008-04-08  1:11   ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information David Gibson
2008-04-08  1:11     ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run David Gibson
2008-04-08  3:25     ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information Hollis Blanchard
2008-04-08  3:25       ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run Hollis Blanchard
2008-04-08  3:25       ` Hollis Blanchard
2008-04-08  3:54       ` David Gibson [this message]
2008-04-08  3:54         ` David Gibson
2008-04-08  3:54         ` David Gibson
2008-04-08  4:06         ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information Hollis Blanchard
2008-04-08  4:06           ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run Hollis Blanchard
2008-04-08  4:16           ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information David Gibson
2008-04-08  4:16             ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run David Gibson
2008-04-10 16:47         ` [kvm-ppc-devel] [PATCH 2 of 3] [KVM] Add DCR access information Josh Boyer
2008-04-10 16:47           ` [PATCH 2 of 3] [KVM] Add DCR access information to struct kvm_run Josh Boyer
2008-04-07 20:53 ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Hollis Blanchard
2008-04-07 20:53   ` [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Hollis Blanchard
2008-04-08  2:12   ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Josh Boyer
2008-04-08  2:12     ` [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Josh Boyer
2008-04-08  4:00     ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Hollis Blanchard
2008-04-08  4:00       ` [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Hollis Blanchard
2008-04-08  4:00       ` Hollis Blanchard
2008-04-08  2:58   ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Arnd Bergmann
2008-04-08  2:58     ` [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Arnd Bergmann
2008-04-08  2:58     ` Arnd Bergmann
2008-04-08  4:19     ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Hollis Blanchard
2008-04-08  4:19       ` [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Hollis Blanchard
2008-04-08  4:19       ` Hollis Blanchard
2008-04-08  5:09       ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM Arnd Bergmann
2008-04-08  5:09         ` [kvm-ppc-devel] [PATCH 3 of 3] [KVM POWERPC] PowerPC 440 KVM implementation Arnd Bergmann
2008-04-08  5:09         ` Arnd Bergmann
2008-04-10 11:55 ` [kvm-ppc-devel] [PATCH 0 of 3] KVM for PowerPC 440 Josh Boyer
2008-04-10 11:55   ` Josh Boyer
2008-04-10 11:55   ` Josh Boyer
2008-04-10 14:26   ` [kvm-ppc-devel] " Hollis Blanchard
2008-04-10 14:26     ` Hollis Blanchard

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