From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] PPC440EPx/sequoia TLB question...
Date: Thu, 24 Apr 2008 15:07:57 +0200 [thread overview]
Message-ID: <200804241507.58057.sr@denx.de> (raw)
In-Reply-To: <1209038285.2946.17.camel@vader.jdub.homelinux.org>
On Thursday 24 April 2008, Josh Boyer wrote:
> > > Hard to define "works fine" - this is the same 440EPx platform I'm
> > > asking about over in the embedded Linux mailing list. I'm pretty sure
> > > the kernel doesn't flag SDRAM as Guarded,
> >
> > Yes, and the 4xx code to dynamically set the SDRAM TLB's in the SPD code
> > doesn't set it either. So it really isn't needed.
>
> Actually, that's not true for kernel memory. We pin 256MiB TLBs to
> cover lowmem in AS0, and the Guarded bit is set. We set it to prevent
> speculative access to memory holes where the 256MiB TLB covers more
> address space than there is physical DRAM.
I wasn't aware of this. Thanks for the explanation.
Best regards,
Stefan
next prev parent reply other threads:[~2008-04-24 13:07 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-04-23 3:11 [U-Boot-Users] PPC440EPx/sequoia TLB question Dave Littell
2008-04-23 12:42 ` Stefan Roese
2008-04-24 2:27 ` Dave Littell
2008-04-24 5:28 ` Stefan Roese
2008-04-24 11:58 ` Josh Boyer
2008-04-24 13:07 ` Stefan Roese [this message]
2008-04-25 2:34 ` [U-Boot-Users] [PATCH] " Dave Littell
2008-04-25 5:31 ` Stefan Roese
2008-04-26 1:54 ` [U-Boot-Users] " Dave Littell
2008-04-29 5:54 ` Stefan Roese
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