From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: kvm-ppc@vger.kernel.org
Subject: Re: [Qemu-devel] [PATCH 2/8] Rename ppc405_sdram_init() to
Date: Mon, 15 Dec 2008 23:14:42 +0000 [thread overview]
Message-ID: <20081215231442.GI8523@volta.aurel32.net> (raw)
In-Reply-To: <449347543ebc8c146307e1c6c7095326751c0167.1229359102.git.hollisb@us.ibm.com>
On Mon, Dec 15, 2008 at 10:44:13AM -0600, Hollis Blanchard wrote:
> The SDRAM controller is shared across almost all 405 and 440 embedded
> processors, with some slight differences such as the sizes supported for each
> memory bank.
>
> Rename only; no functional changes.
>
> Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Thanks, applied.
> ---
> hw/ppc405_uc.c | 4 ++--
> hw/ppc4xx.h | 2 +-
> hw/ppc4xx_devs.c | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
> index 7e7fb38..9275416 100644
> --- a/hw/ppc405_uc.c
> +++ b/hw/ppc405_uc.c
> @@ -2230,7 +2230,7 @@ CPUState *ppc405cr_init (target_phys_addr_t ram_bases[4],
> pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
> *picp = pic;
> /* SDRAM controller */
> - ppc405_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
> + ppc4xx_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
> offset = 0;
> for (i = 0; i < 4; i++)
> offset += ram_sizes[i];
> @@ -2588,7 +2588,7 @@ CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2],
> *picp = pic;
> /* SDRAM controller */
> /* XXX 405EP has no ECC interrupt */
> - ppc405_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
> + ppc4xx_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
> offset = 0;
> for (i = 0; i < 2; i++)
> offset += ram_sizes[i];
> diff --git a/hw/ppc4xx.h b/hw/ppc4xx.h
> index 8c2878a..3b98662 100644
> --- a/hw/ppc4xx.h
> +++ b/hw/ppc4xx.h
> @@ -48,7 +48,7 @@ enum {
> qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs,
> uint32_t dcr_base, int has_ssr, int has_vr);
>
> -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> target_phys_addr_t *ram_bases,
> target_phys_addr_t *ram_sizes,
> int do_init);
> diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
> index c6be2d6..2d27e23 100644
> --- a/hw/ppc4xx_devs.c
> +++ b/hw/ppc4xx_devs.c
> @@ -846,7 +846,7 @@ static void sdram_reset (void *opaque)
> sdram_unmap_bcr(sdram);
> }
>
> -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> target_phys_addr_t *ram_bases,
> target_phys_addr_t *ram_sizes,
> int do_init)
> --
> 1.5.6.5
>
>
>
>
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
WARNING: multiple messages have this Message-ID (diff)
From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: kvm-ppc@vger.kernel.org
Subject: Re: [Qemu-devel] [PATCH 2/8] Rename ppc405_sdram_init() to ppc4xx_sdram_init()
Date: Tue, 16 Dec 2008 00:14:42 +0100 [thread overview]
Message-ID: <20081215231442.GI8523@volta.aurel32.net> (raw)
In-Reply-To: <449347543ebc8c146307e1c6c7095326751c0167.1229359102.git.hollisb@us.ibm.com>
On Mon, Dec 15, 2008 at 10:44:13AM -0600, Hollis Blanchard wrote:
> The SDRAM controller is shared across almost all 405 and 440 embedded
> processors, with some slight differences such as the sizes supported for each
> memory bank.
>
> Rename only; no functional changes.
>
> Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Thanks, applied.
> ---
> hw/ppc405_uc.c | 4 ++--
> hw/ppc4xx.h | 2 +-
> hw/ppc4xx_devs.c | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
> index 7e7fb38..9275416 100644
> --- a/hw/ppc405_uc.c
> +++ b/hw/ppc405_uc.c
> @@ -2230,7 +2230,7 @@ CPUState *ppc405cr_init (target_phys_addr_t ram_bases[4],
> pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
> *picp = pic;
> /* SDRAM controller */
> - ppc405_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
> + ppc4xx_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init);
> offset = 0;
> for (i = 0; i < 4; i++)
> offset += ram_sizes[i];
> @@ -2588,7 +2588,7 @@ CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2],
> *picp = pic;
> /* SDRAM controller */
> /* XXX 405EP has no ECC interrupt */
> - ppc405_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
> + ppc4xx_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init);
> offset = 0;
> for (i = 0; i < 2; i++)
> offset += ram_sizes[i];
> diff --git a/hw/ppc4xx.h b/hw/ppc4xx.h
> index 8c2878a..3b98662 100644
> --- a/hw/ppc4xx.h
> +++ b/hw/ppc4xx.h
> @@ -48,7 +48,7 @@ enum {
> qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs,
> uint32_t dcr_base, int has_ssr, int has_vr);
>
> -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> target_phys_addr_t *ram_bases,
> target_phys_addr_t *ram_sizes,
> int do_init);
> diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c
> index c6be2d6..2d27e23 100644
> --- a/hw/ppc4xx_devs.c
> +++ b/hw/ppc4xx_devs.c
> @@ -846,7 +846,7 @@ static void sdram_reset (void *opaque)
> sdram_unmap_bcr(sdram);
> }
>
> -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks,
> target_phys_addr_t *ram_bases,
> target_phys_addr_t *ram_sizes,
> int do_init)
> --
> 1.5.6.5
>
>
>
>
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
next prev parent reply other threads:[~2008-12-15 23:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-15 16:44 KVM PowerPC support Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 16:44 ` [PATCH 1/8] Move PPC4xx SDRAM controller emulation from ppc405_uc.c to ppc4xx_devs.c Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 23:14 ` [Qemu-devel] [PATCH 1/8] Move PPC4xx SDRAM controller Aurelien Jarno
2008-12-15 23:14 ` [Qemu-devel] [PATCH 1/8] Move PPC4xx SDRAM controller emulation from ppc405_uc.c to ppc4xx_devs.c Aurelien Jarno
2008-12-15 16:44 ` [PATCH 2/8] Rename ppc405_sdram_init() to ppc4xx_sdram_init() Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 23:14 ` Aurelien Jarno [this message]
2008-12-15 23:14 ` Aurelien Jarno
2008-12-15 16:44 ` [PATCH 3/8] Create a helper function to allow more flexible RAM allocation for PPC 4xx Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 23:18 ` [Qemu-devel] [PATCH 3/8] Create a helper function to allow more flexible RAM allocation for PPC Aurelien Jarno
2008-12-15 23:18 ` [Qemu-devel] [PATCH 3/8] Create a helper function to allow more flexible RAM allocation for PPC 4xx Aurelien Jarno
2008-12-15 16:44 ` [PATCH 4/8] kvm: sync vcpu state during initialization Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 22:20 ` Anthony Liguori
2008-12-15 22:20 ` Anthony Liguori
2008-12-15 16:44 ` [PATCH 5/8] Implement device tree support needed for Bamboo emulation Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 23:20 ` Aurelien Jarno
2008-12-15 23:20 ` Aurelien Jarno
2008-12-15 16:44 ` [PATCH 6/8] Enable KVM for ppcemb Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 22:24 ` Anthony Liguori
2008-12-15 22:24 ` Anthony Liguori
2008-12-15 16:44 ` [PATCH 7/8] PowerPC 440EP SoC emulation Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 16:44 ` [PATCH 8/8] IBM PowerPC 440EP Bamboo reference board emulation Hollis Blanchard
2008-12-15 16:44 ` [Qemu-devel] " Hollis Blanchard
2008-12-15 17:03 ` Paul Brook
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